Commit 20d171152616104b9cc54f8a1e8eb96f6cb9c35a
authorMichel Pollet <buserror@gmail.com>
Fri, 24 Jul 2015 15:23:44 +0000 (16:23 +0100)
committerMichel Pollet <buserror@gmail.com>
Fri, 24 Jul 2015 15:23:44 +0000 (16:23 +0100)
tree79353f13b5f86937ba166af540a23b47533b87a2
parent45e7712b4debe764d31b66706abebb18cbc7c6a5
Message:
cores: Gratuitous realignment

ODC got the better of me

Signed-off-by: Michel Pollet <buserror@gmail.com>
simavr/cores/sim_mega2560.c