Commit 3ee01a680e134bd0517404854d957a58e9cf3ca2
authorMichel Pollet <github.com@pollet.net>
Mon, 12 Oct 2015 09:39:18 +0000 (10:39 +0100)
committerMichel Pollet <github.com@pollet.net>
Mon, 12 Oct 2015 09:39:18 +0000 (10:39 +0100)
treeb50245038d7ebdd6215e9040a0b3c546b6adc2d0
parent5570362835d8e60d4fbf80a3fd71d585cc0642d6
parentc99dc41e0754c0d6d8e50f26da23ae22e44d1701
Message:
Merge pull request #134 from bsekisser/bsekisser-master-core-access-r16

core: add pair of 16 bit set register functions
simavr/sim/sim_core.c