Commit 3f6bfcf379882a86b43d06965cfcfdd60076220b
authorMichel Pollet <buserror@gmail.com>
Fri, 24 Jul 2015 15:23:44 +0000 (16:23 +0100)
committerMichel Pollet <buserror@gmail.com>
Fri, 2 Oct 2015 06:24:03 +0000 (07:24 +0100)
treedb2bc17ebf4a490b48642a79374e846713cdecdd
parent599733f261f94317489c2cc8751fb84fd604e6fa
Message:
cores: Gratuitous realignment

ODC got the better of me

Signed-off-by: Michel Pollet <buserror@gmail.com>
simavr/cores/sim_mega2560.c