Commit 6dc37c42aa8c60ee6e41f20718c858e1374dd2c6
authorMichel Pollet <buserror@gmail.com>
Mon, 30 Nov 2009 21:36:55 +0000 (21:36 +0000)
committerMichel Pollet <buserror@gmail.com>
Mon, 30 Nov 2009 21:36:55 +0000 (21:36 +0000)
tree3d51addeb1fe009eac6d778586e079b90b1cb1f0
parentd8e5774323d5408e119b5fa3cce1c73c7345e8f7
Message:
Cores, decoder, uart, ioports - lots of changes

+ Cores now use eeprom declare macro
+ Cores now use the "TXCE" etc bits
+ Uart now raise TXC interupt/flag
+ ioports now use new internal IRQ system
+ New command line options for mcu, freq and trace
+ Decoder updates:
  - Fixed the last known "crash" bug.
  - Added cycles to most multi-cycle opcodes.
  - Added optional stack frame watcher
  - Skip instruction now handle 32 bits skips

Signed-off-by: Michel Pollet <buserror@gmail.com>
15 files changed:
simavr/Makefile
simavr/cores/sim_mega644.c
simavr/cores/sim_megax8.h
simavr/cores/sim_tiny85.c
simavr/sim/avr_eeprom.c
simavr/sim/avr_eeprom.h
simavr/sim/avr_ioport.c
simavr/sim/avr_ioport.h
simavr/sim/avr_uart.c
simavr/sim/avr_uart.h
simavr/sim/sim_core.c
simavr/sim/sim_core.h
simavr/sim/sim_elf.c
simavr/sim/simavr.c
simavr/sim/simavr.h