git.htl-mechatronik.at Git - sx/simavr.git/commit

author	Jakob Gruber <jakob.gruber@gmail.com> Fri, 31 Aug 2012 08:41:03 +0000 (10:41 +0200)
committer	Jakob Gruber <jakob.gruber@gmail.com> Fri, 31 Aug 2012 09:16:32 +0000 (11:16 +0200)
tree	386bf05f04faa508ddbd0dbd270cf6ac1c04897a	tree \| snapshot
parent	026ea0a2d08810bf3d271883532c330dd30cbfe8	commit \| diff

Message:

cores: Use correct extint control register

The atmega1280/atmega1281/atmega128/90usb162
have two external interrupt control registers;
EICRA for ISC[0-3]x, and EICRB for ISC[4-7]x.

5 files changed:

simulation of megaAvr microcontrollers

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simavr/cores/sim_90usb162.c		diff \| blob \| history \| download
simavr/cores/sim_mega128.c		diff \| blob \| history \| download
simavr/cores/sim_mega1280.c		diff \| blob \| history \| download
simavr/cores/sim_mega1281.c		diff \| blob \| history \| download
simavr/sim/avr_extint.h		diff \| blob \| history \| download