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Commit f49e7379d136ee4d72d44ec1527deb1fbb5c7a69
authorMichel Pollet <buserror@gmail.com>
Tue, 15 Dec 2009 21:32:03 +0000 (21:32 +0000)
committerMichel Pollet <buserror@gmail.com>
Tue, 15 Dec 2009 21:32:03 +0000 (21:32 +0000)
tree1aa399083d0326398b02fd44ffbcd1087dd5a331tree | snapshot
parent09a568486c9d386621e0fd6638abed590b74c3f2commit | diff
Message:
Added support for external interrupts (ie INT0 etc)

Small module to implement the INT0 .. INT3 interrupts.
These hook up in ioport pin IRQs to trigger the
vectors.
Added vectors for the existing cores.

Signed-off-by: Michel Pollet <buserror@gmail.com>
7 files changed:
simavr/cores/sim_mega644.c diff | blob | history | download
simavr/cores/sim_megax8.c diff | blob | history | download
simavr/cores/sim_megax8.h diff | blob | history | download
simavr/cores/sim_tinyx5.c diff | blob | history | download
simavr/cores/sim_tinyx5.h diff | blob | history | download
simavr/sim/avr_extint.c [new file with mode: 0644] blob | download
simavr/sim/avr_extint.h [new file with mode: 0644] blob | download
simulation of megaAvr microcontrollers