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Commit
2a7aa7d853046e7b17779f4a558ddf8ef5343570
author
Michel Pollet
<buserror@gmail.com>
Tue, 7 Mar 2017 18:37:42 +0000
(18:37 +0000)
committer
Michel Pollet
<buserror@gmail.com>
Tue, 7 Mar 2017 18:37:42 +0000
(18:37 +0000)
Trace pending vectors, and use the new 'float' option when nothing is
pending
Signed-off-by: Michel Pollet <buserror@gmail.com>
simavr/sim/sim_interrupts.c
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diff --git
a/simavr/sim/sim_interrupts.c
b/simavr/sim/sim_interrupts.c
index 8cd0dd1fef1d9635d4f885e90ba62c83b0f8f5aa..ab5fd9f94397acb32f6b21e9da456a0ec8f02892 100644
(file)
--- a/
simavr/sim/sim_interrupts.c
+++ b/
simavr/sim/sim_interrupts.c
@@
-164,8
+164,11
@@
avr_clear_interrupt(
vector->pending = 0;
avr_raise_irq(vector->irq + AVR_INT_IRQ_PENDING, 0);
- avr_raise_irq(avr->interrupts.irq + AVR_INT_IRQ_PENDING,
- avr_has_pending_interrupts(avr));
+ avr_raise_irq_float(avr->interrupts.irq + AVR_INT_IRQ_PENDING,
+ avr_has_pending_interrupts(avr) ?
+ avr_int_pending_read_at(
+ &avr->interrupts.pending, 0)->vector : 0,
+ !avr_has_pending_interrupts(avr));
if (vector->raised.reg && !vector->raise_sticky)
avr_regbit_clear(avr, vector->raised);