3afc34b1802950b14e589c18f449bb07f2951c4b

Add an extra byte for allowing simavr store the chip's lock bits / boot
lock bits as well as set the default value as defined in a number of
specs.

diff --git a/simavr/cores/sim_core_declare.h b/simavr/cores/sim_core_declare.h
index f69e5ca02b97eeb2816056a613d1c9376149a300..5eca3c3a2aeda4b341194efefb1f3a6d9792d074 100644 (file)
--- a/simavr/cores/sim_core_declare.h
+++ b/simavr/cores/sim_core_declare.h
@@ -78,7 +78,8 @@
        .e2end = E2END, \
        .vector_size = _vector_size, \
        .fuse = _FUSE_HELPER, \
-       .signature = { SIGNATURE_0,SIGNATURE_1,SIGNATURE_2 }
+       .signature = { SIGNATURE_0,SIGNATURE_1,SIGNATURE_2 }, \
+       .lockbits = 0xFF
 #else
 // Disable signature when using an old avr toolchain
 #define DEFAULT_CORE(_vector_size) \

diff --git a/simavr/sim/sim_avr.h b/simavr/sim/sim_avr.h
index cb12166d78f936ab7016ec000dddce41a2ddcd0b..fbd15d54e3c00fe718db626652a8a62bc47fb0df 100644 (file)
--- a/simavr/sim/sim_avr.h
+++ b/simavr/sim/sim_avr.h
@@ -152,6 +152,7 @@ typedef struct avr_t {
        uint8_t         vector_size;
        uint8_t         signature[3];
        uint8_t         fuse[6];
+       uint8_t         lockbits;
        avr_io_addr_t   rampz;  // optional, only for ELPM/SPM on >64Kb cores
        avr_io_addr_t   eind;   // optional, only for EIJMP/EICALL on >64Kb cores
        uint8_t         address_size;   // 2, or 3 for cores >128KB in flash