42dab7385192880a35e9d88f64dc19c1b8d94393

Not tested

Signed-off-by: Michel Pollet <buserror@gmail.com>

diff --git a/simavr/cores/sim_mega128.c b/simavr/cores/sim_mega128.c
index 18a8cdf189d4ae8bedb1fee56801967ee24caecb..bc5a22c50af55e6434b8943093156fe8acf0d441 100644 (file)
--- a/simavr/cores/sim_mega128.c
+++ b/simavr/cores/sim_mega128.c
@@ -164,6 +164,8 @@ struct mcu_t {
                                        AVR_IO_REGBIT(ADMUX, MUX2), AVR_IO_REGBIT(ADMUX, MUX3),
                                        AVR_IO_REGBIT(ADMUX, MUX4),},
                .ref = { AVR_IO_REGBIT(ADMUX, REFS0), AVR_IO_REGBIT(ADMUX, REFS1)},
+               .ref_values = { [1] = ADC_VREF_AVCC, [3] = ADC_VREF_V256 },
+
                .adlar = AVR_IO_REGBIT(ADMUX, ADLAR),
                .r_adcsra = ADCSRA,
                .aden = AVR_IO_REGBIT(ADCSRA, ADEN),
@@ -177,6 +179,30 @@ struct mcu_t {
                //.r_adcsrb = ADCSRB,
                // .adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
 
+               .muxmode = {
+                       [0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
+                       [2] = AVR_ADC_SINGLE(2), [3] = AVR_ADC_SINGLE(3),
+                       [4] = AVR_ADC_SINGLE(4), [5] = AVR_ADC_SINGLE(5),
+                       [6] = AVR_ADC_SINGLE(6), [7] = AVR_ADC_SINGLE(7),
+
+                       [ 8] = AVR_ADC_DIFF(0, 0,  10), [ 9] = AVR_ADC_DIFF(1, 0,  10),
+                       [10] = AVR_ADC_DIFF(0, 0, 200), [11] = AVR_ADC_DIFF(1, 0, 200),
+                       [12] = AVR_ADC_DIFF(2, 2,  10), [13] = AVR_ADC_DIFF(3, 2,  10),
+                       [14] = AVR_ADC_DIFF(2, 2, 200), [15] = AVR_ADC_DIFF(3, 2, 200),
+
+                       [16] = AVR_ADC_DIFF(0, 1,   1), [17] = AVR_ADC_DIFF(1, 1,   1),
+                       [18] = AVR_ADC_DIFF(2, 1,   1), [19] = AVR_ADC_DIFF(3, 1,   1),
+                       [20] = AVR_ADC_DIFF(4, 1,   1), [21] = AVR_ADC_DIFF(5, 1,   1),
+                       [22] = AVR_ADC_DIFF(6, 1,   1), [23] = AVR_ADC_DIFF(7, 1,   1),
+
+                       [24] = AVR_ADC_DIFF(0, 2,   1), [25] = AVR_ADC_DIFF(1, 2,   1),
+                       [26] = AVR_ADC_DIFF(2, 2,   1), [27] = AVR_ADC_DIFF(3, 2,   1),
+                       [28] = AVR_ADC_DIFF(4, 2,   1), [29] = AVR_ADC_DIFF(5, 2,   1),
+
+                       [30] = AVR_ADC_REF(1230),       // 1.1V
+                       [31] = AVR_ADC_REF(0),          // GND
+               },
+
                .adc = {
                        .enable = AVR_IO_REGBIT(ADCSRA, ADIE),
                        .raised = AVR_IO_REGBIT(ADCSRA, ADIF),

diff --git a/simavr/cores/sim_tinyx5.h b/simavr/cores/sim_tinyx5.h
index 0610e57e89dcdfc974a635c8fff803ba83fca58a..90792dfb4499e2b10f91c7d83cb8a3f8fab7b329 100644 (file)
--- a/simavr/cores/sim_tinyx5.h
+++ b/simavr/cores/sim_tinyx5.h
@@ -84,6 +84,12 @@ struct mcu_t SIM_CORENAME = {
                .mux = { AVR_IO_REGBIT(ADMUX, MUX0), AVR_IO_REGBIT(ADMUX, MUX1),
                                        AVR_IO_REGBIT(ADMUX, MUX2), AVR_IO_REGBIT(ADMUX, MUX3),},
                .ref = { AVR_IO_REGBIT(ADMUX, REFS0), AVR_IO_REGBIT(ADMUX, REFS1), AVR_IO_REGBIT(ADMUX, REFS2), },
+               .ref_values = {
+                               [0] = ADC_VREF_VCC, [1] = ADC_VREF_AVCC,
+                               [2] = ADC_VREF_V110, [5] = ADC_VREF_V256,
+                               [6] = ADC_VREF_V256,
+               },
+
                .adlar = AVR_IO_REGBIT(ADMUX, ADLAR),
                .r_adcsra = ADCSRA,
                .aden = AVR_IO_REGBIT(ADCSRA, ADEN),
@@ -99,6 +105,19 @@ struct mcu_t SIM_CORENAME = {
                .bin = AVR_IO_REGBIT(ADCSRB, BIN),
                .ipr = AVR_IO_REGBIT(ADCSRA, IPR),
 
+               .muxmode = {
+                       [0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
+                       [2] = AVR_ADC_SINGLE(2), [3] = AVR_ADC_SINGLE(3),
+
+                       [ 4] = AVR_ADC_DIFF(2, 2,   1), [ 5] = AVR_ADC_DIFF(2, 2,  20),
+                       [ 6] = AVR_ADC_DIFF(2, 3,   1), [ 7] = AVR_ADC_DIFF(2, 3,  20),
+                       [ 8] = AVR_ADC_DIFF(0, 0,   1), [ 9] = AVR_ADC_DIFF(0, 0,  20),
+                       [10] = AVR_ADC_DIFF(0, 1,   1), [11] = AVR_ADC_DIFF(0, 1,  20),
+                       [12] = AVR_ADC_REF(1100),       // Vbg
+                       [13] = AVR_ADC_REF(0),          // GND
+                       [15] = AVR_ADC_TEMP(),
+               },
+
                .adc = {
                        .enable = AVR_IO_REGBIT(ADCSRA, ADIE),
                        .raised = AVR_IO_REGBIT(ADCSRA, ADIF),

diff --git a/simavr/sim/avr_adc.c b/simavr/sim/avr_adc.c
index 781bba373bd48c5dcfcb35e108cea42314e4fff6..3657d6039c2939893f51465e8015edf80cea2780 100644 (file)
--- a/simavr/sim/avr_adc.c
+++ b/simavr/sim/avr_adc.c
@@ -71,6 +71,12 @@ static uint8_t avr_adc_read_l(struct avr_t * avr, avr_io_addr_t addr, void * par
        }
        uint32_t vref = 3300;
        switch (ref) {
+               case ADC_VREF_VCC:
+                       if (!avr->vcc)
+                               printf("ADC Warning : missing VCC analog voltage\n");
+                       else
+                               vref = avr->vcc;
+                       break;
                case ADC_VREF_AREF:
                        if (!avr->aref)
                                printf("ADC Warning : missing AREF analog voltage\n");

diff --git a/simavr/sim/avr_adc.h b/simavr/sim/avr_adc.h
index b86b905438f98ce2428cc5cf792d989c2643120e..cf4ac381594d183297901823d842c8f5f0795957 100644 (file)
--- a/simavr/sim/avr_adc.h
+++ b/simavr/sim/avr_adc.h
@@ -67,6 +67,7 @@ typedef struct avr_adc_mux_t {
 
 enum {
        ADC_VREF_AREF   = 0,    // default mode
+       ADC_VREF_VCC,
        ADC_VREF_AVCC,
        ADC_VREF_V110   = 1100,
        ADC_VREF_V256   = 2560,