50451c746080cc60f50e9441e09fc8764b33df74

diff --git a/simavr/sim/avr_timer.c b/simavr/sim/avr_timer.c
index 779ce66ce06632ae3f6e67a97e912839e660114c..903c6547b71d43f5b723abe42e3afe926e62b2aa 100644 (file)
--- a/simavr/sim/avr_timer.c
+++ b/simavr/sim/avr_timer.c
@@ -348,24 +348,24 @@ avr_timer_reconfigure(
 
        switch (p->wgm_op_mode_kind) {
                case avr_timer_wgm_normal:
-                       avr_timer_configure(p, p->cs_div_clock, p->wgm_op_mode_size, reset);
+                       avr_timer_configure(p, p->cs_div_value, p->wgm_op_mode_size, reset);
                        break;
                case avr_timer_wgm_fc_pwm:
-                       avr_timer_configure(p, p->cs_div_clock, p->wgm_op_mode_size, reset);
+                       avr_timer_configure(p, p->cs_div_value, p->wgm_op_mode_size, reset);
                        break;
                case avr_timer_wgm_ctc: {
-                       avr_timer_configure(p, p->cs_div_clock, _timer_get_ocr(p, AVR_TIMER_COMPA), reset);
+                       avr_timer_configure(p, p->cs_div_value, _timer_get_ocr(p, AVR_TIMER_COMPA), reset);
                }       break;
                case avr_timer_wgm_pwm: {
                        uint16_t top = (p->mode.top == avr_timer_wgm_reg_ocra) ?
                                _timer_get_ocr(p, AVR_TIMER_COMPA) : _timer_get_icr(p);
-                       avr_timer_configure(p, p->cs_div_clock, top, reset);
+                       avr_timer_configure(p, p->cs_div_value, top, reset);
                }       break;
                case avr_timer_wgm_fast_pwm:
-                       avr_timer_configure(p, p->cs_div_clock, p->wgm_op_mode_size, reset);
+                       avr_timer_configure(p, p->cs_div_value, p->wgm_op_mode_size, reset);
                        break;
                case avr_timer_wgm_none:
-                       avr_timer_configure(p, p->cs_div_clock, p->wgm_op_mode_size, reset);
+                       avr_timer_configure(p, p->cs_div_value, p->wgm_op_mode_size, reset);
                        break;
                default: {
                        uint8_t mode = avr_regbit_get_array(avr, p->wgm, ARRAY_SIZE(p->wgm));
@@ -462,9 +462,9 @@ avr_timer_write(
                        // to be synced. To obtain better simulation results
                        // p->tov_base type must be float or avr->frequency
                        // must be multiple of 32768.
-                       p->cs_div_clock = (uint32_t)((float)avr->frequency * (1 << p->cs_div[new_cs]) / 32768);
+                       p->cs_div_value = (uint32_t)((float)avr->frequency * (1 << p->cs_div[new_cs]) / 32768);
                } else {
-                       p->cs_div_clock = 1 << p->cs_div[new_cs];
+                       p->cs_div_value = 1 << p->cs_div[new_cs];
                }
 
        /* mode */

diff --git a/simavr/sim/avr_timer.h b/simavr/sim/avr_timer.h
index 9d4f6e0487e9d8d721b711cf86c08451333e05f4..0b64207f614deed4febf19765c14e673739ee671 100644 (file)
--- a/simavr/sim/avr_timer.h
+++ b/simavr/sim/avr_timer.h
@@ -130,7 +130,7 @@ typedef struct avr_timer_t {
        avr_regbit_t    as2;            // asynchronous clock 32khz
        avr_regbit_t    cs[4];
        uint8_t                 cs_div[16];
-       uint32_t                cs_div_clock;
+       uint32_t                cs_div_value;
 
        avr_regbit_t    icp;            // input capture pin, to link IRQs
        avr_regbit_t    ices;           // input capture edge select