One genuine bug too. The rest was cosmetic.
Signed-off-by: Michel Pollet <buserror@gmail.com>
struct timeval timo = { 0, 500 }; // short, but not too short interval
int ret = select(max, &read_set, &write_set, NULL, &timo);
+ if (!ret)
+ continue;
+
if (FD_ISSET(p->s, &read_set)) {
uint8_t buffer[512];
} else {
z &= ~1;
avr->flash[z++] = r01;
- avr->flash[z++] = r01 >> 8;
+ avr->flash[z] = r01 >> 8;
}
return 0;
}
* print the effects of each instructions on registers
*/
#if CONFIG_SIMAVR_TRACE
+
+#define T(w) w
+
#define REG_TOUCH(a, r) (a)->touched[(r) >> 5] |= (1 << ((r) & 0x1f))
#define REG_ISTOUCHED(a, r) ((a)->touched[(r) >> 5] & (1 << ((r) & 0x1f)))
printf("\n");\
}
#else
+#define T(w)
#define REG_TOUCH(a, r)
#define STATE(_f, args...)
#define SREG()
int8_t d = 16 + ((opcode >> 4) & 0x7);
int16_t res = 0;
uint8_t c = 0;
- const char * name = "";
+ T(const char * name = "";)
switch (opcode & 0x88) {
case 0x00: // MULSU – Multiply Signed Unsigned 0000 0011 0ddd 0rrr
res = ((uint8_t)avr->data[r]) * ((int8_t)avr->data[d]);
c = (res >> 15) & 1;
- name = "mulsu";
+ T(name = "mulsu";)
break;
case 0x08: // FMUL Fractional Multiply Unsigned 0000 0011 0ddd 1rrr
res = ((uint8_t)avr->data[r]) * ((uint8_t)avr->data[d]);
c = (res >> 15) & 1;
res <<= 1;
- name = "fmul";
+ T(name = "fmul";)
break;
case 0x80: // FMULS – Multiply Signed 0000 0011 1ddd 0rrr
res = ((int8_t)avr->data[r]) * ((int8_t)avr->data[d]);
c = (res >> 15) & 1;
res <<= 1;
- name = "fmuls";
+ T(name = "fmuls";)
break;
case 0x88: // FMULSU – Multiply Signed Unsigned 0000 0011 1ddd 0rrr
res = ((uint8_t)avr->data[r]) * ((int8_t)avr->data[d]);
c = (res >> 15) & 1;
res <<= 1;
- name = "fmulsu";
+ T(name = "fmulsu";)
break;
}
cycle++;
case 0x900f: { // POP 1001 000d dddd 1111
uint8_t r = (opcode >> 4) & 0x1f;
_avr_set_r(avr, r, _avr_pop8(avr));
- uint16_t sp = _avr_sp_get(avr);
+ T(uint16_t sp = _avr_sp_get(avr);)
STATE("pop %s (@%04x)[%02x]\n", avr_regname(r), sp, avr->data[sp]);
cycle++;
} break;
case 0x920f: { // PUSH 1001 001d dddd 1111
uint8_t r = (opcode >> 4) & 0x1f;
_avr_push8(avr, avr->data[r]);
- uint16_t sp = _avr_sp_get(avr);
+ T(uint16_t sp = _avr_sp_get(avr);)
STATE("push %s[%02x] (@%04x)\n", avr_regname(r), avr->data[r], sp);
cycle++;
} break;
g->avr->data[regi] = *src;
return 1;
case 32:
- g->avr->data[R_SREG] = * src;
+ g->avr->data[R_SREG] = *src;
return 1;
case 33:
- g->avr->data[R_SPL] = *src++;
- g->avr->data[R_SPH] = *src++;
+ g->avr->data[R_SPL] = src[0];
+ g->avr->data[R_SPH] = src[1];
return 2;
case 34:
g->avr->pc = src[0] | (src[1] << 8) | (src[2] << 16) | (src[3] << 24);
avr_ioctl(avr, AVR_IOCTL_EEPROM_GET, &ee);
if (ee.ee)
src = ee.ee;
- else
+ else {
gdb_send_reply(g, "E01");
+ break;
+ }
} else {
printf("read memory error %08x, %08x (ramend %04x)\n", addr, len, avr->ramend+1);
gdb_send_reply(g, "E01");
printf("%s connection opened\n", __FUNCTION__);
}
- if (FD_ISSET(g->s, &read_set)) {
+ if (g->s != -1 && FD_ISSET(g->s, &read_set)) {
uint8_t buffer[1024];
ssize_t r = recv(g->s, buffer, sizeof(buffer)-1, 0);
avr->pc = v * avr->vector_size;
avr_clear_interrupt(avr, v);
- done++;
+ done = 1;
break;
}
break;
* example.
*
* IRQ Timeline goes as follow with an example transaction that
- * does write addres, write registrer, read a byte after a i2c restart
+ * does write address, write register, read a byte after a i2c restart
* then stops the transaction.
*
* Master: START MOSI START MISO ACK STOP