79fe18854f3454d9e2b7b909ca0091c769039e17

diff --git a/software/nano-644/test_2024-07-23/src/main.cpp b/software/nano-644/test_2024-07-23/src/main.cpp
index 00a2df783266276baca6cf254bc2fdf7db42318f..34abcb62bfb996c704719bdf3fb8fc007b501890 100644 (file)
--- a/software/nano-644/test_2024-07-23/src/main.cpp
+++ b/software/nano-644/test_2024-07-23/src/main.cpp
@@ -154,13 +154,31 @@ uint8_t detectHardwareVersion () {
    while (ADCSRA & (1 << ADSC)) {} // wait for result
    hardwareVersion = 0; // unknown board version
    // printf("Hardware-Version: ADC7H = %d\n", ADCH);
-   if (ADCH >= 0xf0) {
-      hardwareVersion = 1;
-   } else if (ADCH >= 0xe0) {
-      hardwareVersion = 2;
-   } else {
-      printf("Invalid Hardware-Version: ADC7H = %d\n", ADCH);
+   #if defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__)
+      if (ADCH >= 0xf0) {
+         hardwareVersion = 1;
+      } else if (ADCH >= 0xe0) {
+         hardwareVersion = 2;
+      }
+   #endif
+   #if defined(__AVR_ATmega328P__)
+      if (ADCH < 0xd0 && ADCH >= 0xc0) {
+         hardwareVersion = 1;
+      } else if (ADCH < 0xd0 && ADCH >= 0xb0) {
+         hardwareVersion = 2;
+      }
+   #endif
+
+   if (hardwareVersion == 0) {
+      #ifdef __AVR_ATmega644P__
+         printf("Invalid Hardware-Version: ADC7H = %d (ATmega644P, 3.3V)\n", ADCH);
+      #elif __AVR_ATmega1284P__
+         printf("Invalid Hardware-Version: ADC7H = %d (ATmega1284P, 3.3V)\n", ADCH);
+      #elif __AVR_ATmega328P__
+         printf("Invalid Hardware-Version: ADC7H = %d (ATmega328P, 5V)\n", ADCH);
+      #endif
    }
+
    ADMUX = 0;
    ADCSRA = 0;
    return hardwareVersion;

diff --git a/software/nano-644/test_2024-07-23/src/units/seg7.cpp b/software/nano-644/test_2024-07-23/src/units/seg7.cpp
index 208107bcc0b74d96104a5699ca393cc66522d559..f5224564e2128aafc1e02e95a7bdcf36402d469c 100644 (file)
--- a/software/nano-644/test_2024-07-23/src/units/seg7.cpp
+++ b/software/nano-644/test_2024-07-23/src/units/seg7.cpp
@@ -6,41 +6,63 @@
 
 #if defined(__AVR_ATmega644P__) || defined(__AVR_ATmega1284P__)
 
-   // Nano-644
+   // Nano-644 / Nano 1284
    // ---------------------------------------------------------------
 
-   // PA0 ... Cathode Char 1
-   // PA1 ... Cathode Char 2
-   // PA2 ... Cathode Char 3
-   // PA3 ... Cathode Char 4
-
-   // PB0 ... Anode Segment A
-   // PB1 ... Anode Segment B
-   // PB2 ... Anode Segment C
-   // PB3 ... Anode Segment D
-   // PB4 ... Anode Segment E
-   // PB5 ... Anode Segment F
-   // PB6 ... Anode Segment G
-   // PB7 ... Anode DP
-
-   // PD5 ... nOE (Output Enable) for all LEDs
-   // PD6 ... Anode L1:2
-   // PD7 ... Anode L3
+   // Nano-X-Base             V1a  V2a
+   // ---------------------------------
+   // Anode Segment A ....... PB0  PB0
+   // Anode Segment B ....... PB1  PB1
+   // Anode Segment C ....... PB2  PB2
+   // Anode Segment D ....... PB3  PB3
+   // Anode Segment E ....... PB4  PB4
+   // Anode Segment F ....... PB5  PB5
+   // Anode Segment G ....... PB6  PB6
+   // Anode DP .............. PB7  PB7
+   // ---------------------------------
+   // Cathode Char 1 ........ PA0  PD4
+   // Cathode Char 2 ........ PA1  PD5
+   // Cathode Char 3 ........ PA2  PD6
+   // Cathode Char 4 ........ PA3  PD7
+   // ---------------------------------
+   // nOE (Output Enable) ... PD5  PA1
+   // Anode L1:2 ............ PD6  PA2
+   // Anode L3 .............. PD7  PA3
 
 void Seg7::init () {
       setAnodes(0);
       setCathodes(0);
-      DDRA |= (1 << PA3) | (1 << PA2) | (1 << PA1) | (1 << PA0);
       DDRB = 0xff;
-      DDRD |= (1 << PD7) | (1 << PD6) | (1 << PD5);
+      switch (hardwareVersion) {
+         case 1: {
+            DDRA |= (1 << PA3) | (1 << PA2) | (1 << PA1) | (1 << PA0);
+            DDRD |= (1 << PD7) | (1 << PD6) | (1 << PD5);
+            break;
+         }
+         case 2: {
+            DDRA |= (1 << PA3) | (1 << PA2) | (1 << PA1);
+            DDRD |= (1 << PD7) | (1 << PD6) | (1 << PD5) | (1 << PD4);
+         }
+         break;
+      }
    }
 
    void Seg7::cleanup () {
       setAnodes(0);
       setCathodes(0);
-      DDRA &= ~((1 << PA3) | (1 << PA2) | (1 << PA1) | (1 << PA0));
       DDRB = 0x00;
-      DDRD &= ~((1 << PD7) | (1 << PD6) | (1 << PD5));
+      switch (hardwareVersion) {
+         case 1: {
+            DDRA &= ~((1 << PA3) | (1 << PA2) | (1 << PA1) | (1 << PA0));
+            DDRD &= ~((1 << PD7) | (1 << PD6) | (1 << PD5));
+            break;
+         }
+         case 2: {
+            DDRA &= ~((1 << PA3) | (1 << PA2) | (1 << PA1));
+            DDRD &= ~((1 << PD7) | (1 << PD6) | (1 << PD5) | (1 << PD4));
+         }
+         break;
+      }
    }
 
    void Seg7::setAnodes (uint16_t a) {
@@ -52,22 +74,43 @@ void Seg7::init () {
       if (a & 0x0020) PORTB |= (1 << PB5); else PORTB &= ~(1 << PB5); // Anode Char F
       if (a & 0x0040) PORTB |= (1 << PB6); else PORTB &= ~(1 << PB6); // Anode Char G
       if (a & 0x0080) PORTB |= (1 << PB7); else PORTB &= ~(1 << PB7); // Anode Char DP
-      if (a & 0x0100) PORTD |= (1 << PD6); else PORTD &= ~(1 << PD6); // Anode L1/L2
-      if (a & 0x0200) PORTD |= (1 << PD7); else PORTD &= ~(1 << PD7); // Anode L3
+      switch (hardwareVersion) {
+         case 1: {
+            if (a & 0x0100) PORTD |= (1 << PD6); else PORTD &= ~(1 << PD6); // Anode L1/L2
+            if (a & 0x0200) PORTD |= (1 << PD7); else PORTD &= ~(1 << PD7); // Anode L3
+            break;
+         }
+         case 2: {
+            if (a & 0x0100) PORTA |= (1 << PA2); else PORTA &= ~(1 << PA2); // Anode L1/L2
+            if (a & 0x0200) PORTA |= (1 << PA3); else PORTA &= ~(1 << PA3); // Anode L3
+            break;
+         }
+      }
    }
 
    void Seg7::setCathodes (uint8_t c) {
-      if (c & 0x01) PORTA |= (1 << PA0); else PORTA &= ~(1 << PA0); // Chathode Char 1 (most left)
-      if (c & 0x02) PORTA |= (1 << PA1); else PORTA &= ~(1 << PA1); // Chathode Char 2
-      if (c & 0x04) PORTA |= (1 << PA2); else PORTA &= ~(1 << PA2); // Chathode Char 3
-      if (c & 0x08) PORTA |= (1 << PA3); else PORTA &= ~(1 << PA3); // Chathode Char 4 (most right)
+      switch (hardwareVersion) {
+         case 1: {
+            if (c & 0x01) PORTA |= (1 << PA0); else PORTA &= ~(1 << PA0); // Chathode Char 1 (most left)
+            if (c & 0x02) PORTA |= (1 << PA1); else PORTA &= ~(1 << PA1); // Chathode Char 2
+            if (c & 0x04) PORTA |= (1 << PA2); else PORTA &= ~(1 << PA2); // Chathode Char 3
+            if (c & 0x08) PORTA |= (1 << PA3); else PORTA &= ~(1 << PA3); // Chathode Char 4 (most right)
+            break;
+         }
+         case 2: {
+            if (c & 0x01) PORTD |= (1 << PD4); else PORTD &= ~(1 << PD4); // Chathode Char 1 (most left)
+            if (c & 0x02) PORTD |= (1 << PD5); else PORTD &= ~(1 << PD5); // Chathode Char 2
+            if (c & 0x04) PORTD |= (1 << PD6); else PORTD &= ~(1 << PD6); // Chathode Char 3
+            if (c & 0x08) PORTD |= (1 << PD7); else PORTD &= ~(1 << PD7); // Chathode Char 4 (most right)
+            break;
+         }
+      }
    }
 
    void Seg7::setOE (bool enabled) {
-      if (enabled) {
-         PORTD &= ~(1 << PD5);
-      } else {
-         PORTD |= (1 << PD5);
+      switch (hardwareVersion) {
+         case 1: if (enabled) PORTD &= ~(1 << PD5); else PORTD |= (1 << PD5); break;
+         case 2: if (enabled) PORTA &= ~(1 << PA1); else PORTA |= (1 << PA1); break;
       }
    }
 
@@ -78,31 +121,45 @@ void Seg7::init () {
    // Arduino-Nano-5V
    // ---------------------------------------------------------------
 
-   // PC0 ... Cathode Char 1
-   // PC1 ... Cathode Char 2
-   // PC2 ... Cathode Char 3
-   // PC3 ... Cathode Char 4
+   // Nano-X-Base             V1a  V2a
+   // ---------------------------------
+   // Anode Segment A ....... PD4  PD4
+   // Anode Segment B ....... PB0  PB0
+   // Anode Segment C ....... PD7  PD7
+   // Anode Segment D ....... PD6  PD6
+   // Anode Segment E ....... PB2  PB2
+   // Anode Segment F ....... PB3  PB3
+   // Anode Segment G ....... PB4  PB4
+   // Anode DP .............. PB5  PB5
+   // ---------------------------------
+   // Cathode Char 1 ........ PC0  PD5
+   // Cathode Char 2 ........ PC1  PB1
+   // Cathode Char 3 ........ PC2  PD3
+   // Cathode Char 4 ........ PC3  PD2
+   // ---------------------------------
+   // nOE (Output Enable) ... PB1  PC1
+   // Anode L1:2 ............ PD3  PC2
+   // Anode L3 .............. PD2  PC3
 
-   // PD4 ... Anode Segment A
-   // PB0 ... Anode Segment B
-   // PD7 ... Anode Segment C
-   // PD6 ... Anode Segment D
-   // PB2 ... Anode Segment E
-   // PB3 ... Anode Segment F
-   // PB4 ... Anode Segment G
-   // PB5 ... Anode DP
-
-   // PB1 ... nOE (Output Enable) for all LEDs
-   // PD3 ... Anode L1:2
-   // PD2 ,,, Anode L3
 
    void Seg7::init () {
       enabled = 1;
       setAnodes(0);
       setCathodes(0);
-      DDRB |= (1 << PB5) | (1 << PB4) | (1 << PB3) | (1 << PB2) | (1 << PB1) | (1 << PB0) ;
-      DDRC |= (1 << PC3) | (1 << PC2) | (1 << PC1) | (1 << PC0);
-      DDRD |= (1 << PD7) | (1 << PD6) | (1 << PD4) | (1 << PD3) | (1 << PD2);
+      switch (hardwareVersion) {
+         case 1: {
+            DDRB |= (1 << PB5) | (1 << PB4) | (1 << PB3) | (1 << PB2) | (1 << PB1) | (1 << PB0);
+            DDRC |= (1 << PC3) | (1 << PC2) | (1 << PC1) | (1 << PC0);
+            DDRD |= (1 << PD7) | (1 << PD6) | (1 << PD4) | (1 << PD3) | (1 << PD2);
+            break;
+         }
+         case 2: {
+            DDRB |= (1 << PB5) | (1 << PB4) | (1 << PB3) | (1 << PB2) | (1 << PB1) | (1 << PB0);
+            DDRC |= (1 << PC3) | (1 << PC2) | (1 << PC1);
+            DDRD |= (1 << PD7) | (1 << PD6) | (1 << PD5) | (1 << PD4) | (1 << PD3) | (1 << PD2);
+            break;
+         }
+      }
 
    }
 
@@ -110,9 +167,21 @@ void Seg7::init () {
       enabled = 0;
       setAnodes(0);
       setCathodes(0);
-      DDRB &= ~((1 << PB5) | (1 << PB4) | (1 << PB3) | (1 << PB2) | (1 << PB1) | (1 << PB0));
-      DDRC &= ~((1 << PC3) | (1 << PC2) | (1 << PC1) | (1 << PC0));
-      DDRD &= ~((1 << PD7) | (1 << PD6) | (1 << PD4) | (1 << PD3) | (1 << PD2));
+      switch (hardwareVersion) {
+         case 1: {
+            DDRB &= ~((1 << PB5) | (1 << PB4) | (1 << PB3) | (1 << PB2) | (1 << PB1) | (1 << PB0));
+            DDRC &= ~((1 << PC3) | (1 << PC2) | (1 << PC1) | (1 << PC0));
+            DDRD &= ~((1 << PD7) | (1 << PD6) | (1 << PD4) | (1 << PD3) | (1 << PD2));
+            break;
+         }
+         case 2: {
+            DDRB &= ~((1 << PB5) | (1 << PB4) | (1 << PB3) | (1 << PB2) | (1 << PB1) | (1 << PB0) );
+            DDRC &= ~((1 << PC3) | (1 << PC2) | (1 << PC1));
+            DDRD &= ~((1 << PD7) | (1 << PD6) | (1 << PD5) | (1 << PD4) | (1 << PD3) | (1 << PD2));
+            break;
+         }
+      }
+
    }
 
    void Seg7::setAnodes (uint16_t a) {
@@ -124,22 +193,43 @@ void Seg7::init () {
       if (a & 0x0020) PORTB |= (1 << PB3); else PORTB &= ~(1 << PB3); // Anode Char F
       if (a & 0x0040) PORTB |= (1 << PB4); else PORTB &= ~(1 << PB4); // Anode Char G
       if (a & 0x0080) PORTB |= (1 << PB5); else PORTB &= ~(1 << PB5); // Anode Char DP
-      if (a & 0x0100) PORTD |= (1 << PD3); else PORTD &= ~(1 << PD3); // Anode L1/L2
-      if (a & 0x0200) PORTD |= (1 << PD2); else PORTD &= ~(1 << PD2); // Anode L3
+      switch (hardwareVersion) {
+         case 1: {
+            if (a & 0x0100) PORTD |= (1 << PD3); else PORTD &= ~(1 << PD3); // Anode L1/L2
+            if (a & 0x0200) PORTD |= (1 << PD2); else PORTD &= ~(1 << PD2); // Anode L3
+            break;
+         }
+         case 2: {
+            if (a & 0x0100) PORTC |= (1 << PC2); else PORTC &= ~(1 << PC2); // Anode L1/L2
+            if (a & 0x0200) PORTC |= (1 << PC3); else PORTC &= ~(1 << PC3); // Anode L3
+            break;
+         }
+      }
    }
 
    void Seg7::setCathodes (uint8_t c) {
-      if (c & 0x01) PORTC |= (1 << PC0); else PORTC &= ~(1 << PC0); // Chathode Char 1 (most left)
-      if (c & 0x02) PORTC |= (1 << PC1); else PORTC &= ~(1 << PC1); // Chathode Char 2
-      if (c & 0x04) PORTC |= (1 << PC2); else PORTC &= ~(1 << PC2); // Chathode Char 3
-      if (c & 0x08) PORTC |= (1 << PC3); else PORTC &= ~(1 << PC3); // Chathode Char 4 (most right)
+      switch (hardwareVersion) {
+         case 1: {
+            if (c & 0x01) PORTC |= (1 << PC0); else PORTC &= ~(1 << PC0); // Chathode Char 1 (most left)
+            if (c & 0x02) PORTC |= (1 << PC1); else PORTC &= ~(1 << PC1); // Chathode Char 2
+            if (c & 0x04) PORTC |= (1 << PC2); else PORTC &= ~(1 << PC2); // Chathode Char 3
+            if (c & 0x08) PORTC |= (1 << PC3); else PORTC &= ~(1 << PC3); // Chathode Char 4 (most right)
+            break;
+         }
+         case 2: {
+            if (c & 0x01) PORTD |= (1 << PD5); else PORTD &= ~(1 << PD5); // Chathode Char 1 (most left)
+            if (c & 0x02) PORTB |= (1 << PB1); else PORTB &= ~(1 << PB1); // Chathode Char 2
+            if (c & 0x04) PORTD |= (1 << PD3); else PORTD &= ~(1 << PD3); // Chathode Char 3
+            if (c & 0x08) PORTD |= (1 << PD2); else PORTD &= ~(1 << PD2); // Chathode Char 4 (most right)
+            break;
+         }
+      }
    }
 
    void Seg7::setOE (bool enabled) {
-      if (enabled) {
-         PORTB &= ~(1 << PB1);
-      } else {
-         PORTB |= (1 << PB1);
+      switch (hardwareVersion) {
+         case 1: if (enabled)  PORTB &= ~(1 << PB1); else PORTB |= (1 << PB1); break;
+         case 2: if (enabled)  PORTC &= ~(1 << PC1); else PORTC |= (1 << PC1); break;
       }
    }