.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcl = ADCL,
.r_adcsrb = ADCSRB,
- .adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2), AVR_IO_REGBIT(ADCSRB, ADTS3),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_external_interrupt_0,
+ [2] = avr_adts_timer_0_compare_match_a,
+ [3] = avr_adts_timer_0_overflow,
+ [4] = avr_adts_timer_1_compare_match_b,
+ [5] = avr_adts_timer_1_overflow,
+ [6] = avr_adts_timer_1_capture_event,
+ [7] = avr_adts_psc_module_0_sync_signal,
+ [8] = avr_adts_psc_module_1_sync_signal,
+ [9] = avr_adts_psc_module_2_sync_signal,
+ [10] = avr_adts_analog_comparator_0,
+ [11] = avr_adts_analog_comparator_1,
+ [12] = avr_adts_analog_comparator_2,
+ [13] = avr_adts_analog_comparator_3,
+ },
.muxmode = {
[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_1_compare_match_b,
+ [6] = avr_adts_timer_1_overflow,
+ [7] = avr_adts_timer_1_capture_event,
+ },
.bin = AVR_IO_REGBIT(ADCSRB, BIN),
.muxmode = {
.r_adcsrb = ADCSRB,
.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+ .adts_op = {
+ [0] = avr_adts_free_running,
+ [1] = avr_adts_analog_comparator_0,
+ [2] = avr_adts_external_interrupt_0,
+ [3] = avr_adts_timer_0_compare_match_a,
+ [4] = avr_adts_timer_0_overflow,
+ [5] = avr_adts_timer_0_compare_match_b,
+ [6] = avr_adts_pin_change_interrupt,
+ },
+
.bin = AVR_IO_REGBIT(ADCSRB, BIN),
.ipr = AVR_IO_REGBIT(ADCSRA, IPR),
ADC_VREF_V256 = 2560,
};
+// ADC trigger sources
+typedef enum {
+ avr_adrs_invalid = 0,
+ avr_adts_free_running,
+ avr_adts_analog_comparator_0,
+ avr_adts_analog_comparator_1,
+ avr_adts_analog_comparator_2,
+ avr_adts_analog_comparator_3,
+ avr_adts_external_interrupt_0,
+ avr_adts_timer_0_compare_match_a,
+ avr_adts_timer_0_compare_match_b,
+ avr_adts_timer_0_overflow,
+ avr_adts_timer_1_compare_match_b,
+ avr_adts_timer_1_overflow,
+ avr_adts_timer_1_capture_event,
+ avr_adts_pin_change_interrupt,
+ avr_adts_psc_module_0_sync_signal,
+ avr_adts_psc_module_1_sync_signal,
+ avr_adts_psc_module_2_sync_signal,
+} avr_adts_type;
+
typedef struct avr_adc_t {
avr_io_t io;
uint8_t r_adcl, r_adch; // Data Registers
uint8_t r_adcsrb; // ADC Control and Status Register B
- avr_regbit_t adts[3]; // Timing Source
+ avr_regbit_t adts[4]; // Timing Source
+ avr_adts_type adts_op[16]; // ADTS type
avr_regbit_t bin; // Bipolar Input Mode (tinyx5 have it)
avr_regbit_t ipr; // Input Polarity Reversal (tinyx5 have it)