ae52fb327a9b4a792f45760f407b6c7e69b3cf1d

Based on the instrtiming.elf code and checking the Avr Instruction
 Manual, RCALL was found to be producing incorrect cycle counts.

Atmega; 3, 16-bit pc; 4, 22-bit pc.

Fixed accordingly.

	modified:   sim/sim_core.c

diff --git a/simavr/sim/sim_core.c b/simavr/sim/sim_core.c
index 6fb150ef58aca5ae9123fd208ba24037c668f02b..781ee844d7c4089d3c5ec4dedb37c04f80e7e149 100644 (file)
--- a/simavr/sim/sim_core.c
+++ b/simavr/sim/sim_core.c
@@ -1360,7 +1360,7 @@ avr_flashaddr_t avr_run_one(avr_t * avr)
                case 0xd000: {  // RCALL -- 1101 kkkk kkkk kkkk
                        get_o_12(opcode);
                        STATE("rcall .%d [%04x]\n", o, new_pc + (o << 1));
-                       cycle += _avr_push_addr(avr, new_pc) - 1;
+                       cycle += _avr_push_addr(avr, new_pc);
                        new_pc = new_pc + (o << 1);
                        // 'rcall .1' is used as a cheap "push 16 bits of room on the stack"
                        if (o != 0) {