af790c58090162607ebf2a7c5a202e93077e4abb

The Self Program Memory Control Register (SPMCR) has a bit for enabling
the read while write section (RWWSRE). This is also used for clearing
the temporary page buffer that is used for page writing (PGWRT). The
read while write section busy (RWWSB) allows the application developer
to know when the RWW section is accessible and when programming of it
has completed.

This commit does not wire up the behavior but just allows the flash
structure to understand that it supports a RWW section.

diff --git a/simavr/cores/sim_megax8.h b/simavr/cores/sim_megax8.h
index b0bc336bc20a3a46108483bc195923f80528a683..ea32478408900a27c5108aac2cb38b6c16c1540b 100644 (file)
--- a/simavr/cores/sim_megax8.h
+++ b/simavr/cores/sim_megax8.h
@@ -73,7 +73,11 @@ const struct mcu_t SIM_CORENAME = {
                .reset = mx8_reset,
        },
        AVR_EEPROM_DECLARE(EE_READY_vect),
+#ifdef RWWSRE
        AVR_SELFPROG_DECLARE(SPMCSR, SELFPRGEN, SPM_READY_vect),
+#else
+       AVR_SELFPROG_DECLARE_NORWW(SPMCSR, SELFPRGEN, SPM_READY_vect),
+#endif
        AVR_WATCHDOG_DECLARE(WDTCSR, WDT_vect),
        .extint = {
                AVR_EXTINT_DECLARE(0, 'D', 2),

diff --git a/simavr/sim/avr_flash.h b/simavr/sim/avr_flash.h
index 7714250d1b5eec0efe2ac5d11cf6714dc2cc49cb..f7fbbd414e19d17daaecb6456e981cee61b54c07 100644 (file)
--- a/simavr/sim/avr_flash.h
+++ b/simavr/sim/avr_flash.h
@@ -36,23 +36,28 @@ extern "C" {
 typedef struct avr_flash_t {
        avr_io_t        io;
 
+       uint16_t        flags;
        uint16_t        spm_pagesize;
        uint8_t r_spm;
        avr_regbit_t selfprgen;
        avr_regbit_t pgers;             // page erase
        avr_regbit_t pgwrt;             // page write
        avr_regbit_t blbset;    // lock bit set
+       avr_regbit_t rwwsre;    // read while write section read enable
+       avr_regbit_t rwwsb;             // read while write section busy
 
        avr_int_vector_t flash; // Interrupt vector
 } avr_flash_t;
 
+/* Set if the flash supports a Read While Write section */
+#define AVR_SELFPROG_HAVE_RWW (1 << 0)
+
 void avr_flash_init(avr_t * avr, avr_flash_t * p);
 
 
 #define AVR_IOCTL_FLASH_SPM            AVR_IOCTL_DEF('f','s','p','m')
 
-#define AVR_SELFPROG_DECLARE(_spmr, _spen, _vector) \
-       .selfprog = {\
+#define AVR_SELFPROG_DECLARE_INTERNAL(_spmr, _spen, _vector) \
                .r_spm = _spmr,\
                .spm_pagesize = SPM_PAGESIZE,\
                .selfprgen = AVR_IO_REGBIT(_spmr, _spen),\
@@ -62,7 +67,20 @@ void avr_flash_init(avr_t * avr, avr_flash_t * p);
                .flash = {\
                        .enable = AVR_IO_REGBIT(_spmr, SPMIE),\
                        .vector = _vector,\
-               },\
+               }\
+
+#define AVR_SELFPROG_DECLARE_NORWW(_spmr, _spen, _vector) \
+       .selfprog = {\
+               .flags = 0,\
+               AVR_SELFPROG_DECLARE_INTERNAL(_spmr, _spen, _vector),\
+       }
+
+#define AVR_SELFPROG_DECLARE(_spmr, _spen, _vector) \
+       .selfprog = {\
+               .flags = AVR_SELFPROG_HAVE_RWW,\
+               AVR_SELFPROG_DECLARE_INTERNAL(_spmr, _spen, _vector),\
+               .rwwsre = AVR_IO_REGBIT(_spmr, RWWSRE),\
+               .rwwsb = AVR_IO_REGBIT(_spmr, RWWSB),\
        }
 
 #ifdef __cplusplus