extern "C" {
#endif
+#include "sim_irq.h"
+
typedef uint64_t avr_cycle_count_t;
typedef uint16_t avr_io_addr_t;
// called at reset time
void (*reset)(struct avr_t * avr);
- /*
+ /*!
* Default AVR core run function.
* Two modes are available, a "raw" run that goes as fast as
* it can, and a "gdb" mode that also watchouts for gdb events
*/
void (*run)(struct avr_t * avr);
- /*
+ /*!
* Sleep default behaviour.
* In "raw" mode, it calls usleep, in gdb mode, it waits
* for howLong for gdb command on it's sockets.
*/
void (*sleep)(struct avr_t * avr, avr_cycle_count_t howLong);
+ /*!
+ * Every IRQs will be stored in this pool. It is not
+ * mandatory (yet) but will allow listing IRQs and their connections
+ */
+ avr_irq_pool_t irq_pool;
// Mirror of the SREG register, to facilitate the access to bits
// in the opcode decoder.
#include "sim_io.h"
#include "sim_regbit.h"
#include "sim_interrupts.h"
-#include "sim_irq.h"
#include "sim_cycle_timers.h"
#endif /*__SIM_AVR_H__*/
#include <string.h>
#include "sim_io.h"
-int avr_ioctl(avr_t *avr, uint32_t ctl, void * io_param)
+int
+avr_ioctl(
+ avr_t *avr,
+ uint32_t ctl,
+ void * io_param)
{
avr_io_t * port = avr->io_port;
int res = -1;
return res;
}
-void avr_register_io(avr_t *avr, avr_io_t * io)
+void
+avr_register_io(
+ avr_t *avr,
+ avr_io_t * io)
{
io->next = avr->io_port;
io->avr = avr;
avr->io_port = io;
}
-void avr_register_io_read(avr_t *avr, avr_io_addr_t addr, avr_io_read_t readp, void * param)
+void
+avr_register_io_read(
+ avr_t *avr,
+ avr_io_addr_t addr,
+ avr_io_read_t readp,
+ void * param)
{
avr_io_addr_t a = AVR_DATA_TO_IO(addr);
if (avr->io[a].r.param || avr->io[a].r.c) {
}
static void
-_avr_io_mux_write(avr_t * avr, avr_io_addr_t addr, uint8_t v, void * param)
+_avr_io_mux_write(
+ avr_t * avr,
+ avr_io_addr_t addr,
+ uint8_t v,
+ void * param)
{
int io = (int)param;
for (int i = 0; i < avr->io_shared_io[io].used; i++) {
}
}
-void avr_register_io_write(avr_t *avr, avr_io_addr_t addr, avr_io_write_t writep, void * param)
+void
+avr_register_io_write(
+ avr_t *avr,
+ avr_io_addr_t addr,
+ avr_io_write_t writep,
+ void * param)
{
avr_io_addr_t a = AVR_DATA_TO_IO(addr);
avr->io[a].w.c = writep;
}
-struct avr_irq_t * avr_io_getirq(avr_t * avr, uint32_t ctl, int index)
+avr_irq_t *
+avr_io_getirq(
+ avr_t * avr,
+ uint32_t ctl,
+ int index)
{
avr_io_t * port = avr->io_port;
while (port) {
}
-avr_irq_t * avr_iomem_getirq(avr_t * avr, avr_io_addr_t addr, int index)
+avr_irq_t *
+avr_iomem_getirq(
+ avr_t * avr,
+ avr_io_addr_t addr,
+ int index)
{
avr_io_addr_t a = AVR_DATA_TO_IO(addr);
if (avr->io[a].irq == NULL) {
- avr->io[a].irq = avr_alloc_irq(0, 9);
+ avr->io[a].irq = avr_alloc_irq(&avr->irq_pool, 0, 9, NULL /* TODO: names*/);
// mark the pin ones as filtered, so they only are raised when changing
for (int i = 0; i < 8; i++)
avr->io[a].irq[i].flags |= IRQ_FLAG_FILTERED;
return index < 9 ? avr->io[a].irq + index : NULL;
}
-struct avr_irq_t * avr_io_setirqs(avr_io_t * io, uint32_t ctl, int count, struct avr_irq_t * irqs)
+avr_irq_t *
+avr_io_setirqs(
+ avr_io_t * io,
+ uint32_t ctl,
+ int count,
+ avr_irq_t * irqs)
{
// allocate this module's IRQ
io->irq_count = count;
- io->irq = irqs ? irqs : avr_alloc_irq(0, count);
+ io->irq = irqs ? irqs :
+ avr_alloc_irq(&io->avr->irq_pool, 0,
+ count, NULL /* TODO: names*/);
io->irq_ioctl_get = ctl;
return io->irq;
}
-static void avr_deallocate_io(avr_io_t * io)
+static void
+avr_deallocate_io(
+ avr_io_t * io)
{
if (io->dealloc)
io->dealloc(io);
io->next = NULL;
}
-void avr_deallocate_ios(avr_t * avr)
+void
+avr_deallocate_ios(
+ avr_t * avr)
{
avr_io_t * port = avr->io_port;
while (port) {
// registers an IO module, so it's run(), reset() etc are called
// this is called by the AVR core init functions, you /could/ register an external
// one after instanciation, for whatever purpose...
-void avr_register_io(avr_t *avr, avr_io_t * io);
+void
+avr_register_io(
+ avr_t *avr,
+ avr_io_t * io);
// Sets an IO module "official" IRQs and the ioctl used to get to them. if 'irqs' is NULL,
// 'count' will be allocated
-struct avr_irq_t * avr_io_setirqs(avr_io_t * io, uint32_t ctl, int count, struct avr_irq_t * irqs);
+avr_irq_t *
+avr_io_setirqs(
+ avr_io_t * io,
+ uint32_t ctl,
+ int count,
+ avr_irq_t * irqs);
// register a callback for when IO register "addr" is read
-void avr_register_io_read(avr_t *avr, avr_io_addr_t addr, avr_io_read_t read, void * param);
+void
+avr_register_io_read(
+ avr_t *avr,
+ avr_io_addr_t addr,
+ avr_io_read_t read,
+ void * param);
// register a callback for when the IO register is written. callback has to set the memory itself
-void avr_register_io_write(avr_t *avr, avr_io_addr_t addr, avr_io_write_t write, void * param);
+void
+avr_register_io_write(
+ avr_t *avr,
+ avr_io_addr_t addr,
+ avr_io_write_t write,
+ void * param);
// call every IO modules until one responds to this
-int avr_ioctl(avr_t *avr, uint32_t ctl, void * io_param);
+int
+avr_ioctl(
+ avr_t *avr,
+ uint32_t ctl,
+ void * io_param);
// get the specific irq for a module, check AVR_IOCTL_IOPORT_GETIRQ for example
struct avr_irq_t * avr_io_getirq(avr_t * avr, uint32_t ctl, int index);
//
// the "index" is a bit number, or ALL bits if index == 8
#define AVR_IOMEM_IRQ_ALL 8
-struct avr_irq_t * avr_iomem_getirq(avr_t * avr, avr_io_addr_t addr, int index);
+avr_irq_t *
+avr_iomem_getirq(
+ avr_t * avr,
+ avr_io_addr_t addr,
+ int index);
// Terminates all IOs and remove from them from the io chain
-void avr_deallocate_ios(avr_t *avr);
+void
+avr_deallocate_ios(
+ avr_t *avr);
#ifdef __cplusplus
};
vcd->period = avr_usec_to_cycles(vcd->avr, period);
for (int i = 0; i < AVR_VCD_MAX_SIGNALS; i++) {
- avr_init_irq(&vcd->signal[i].irq, i, 1);
+ avr_init_irq(&avr->irq_pool, &vcd->signal[i].irq, i, 1, NULL /* TODO IRQ name */);
avr_irq_register_notify(&vcd->signal[i].irq, _avr_vcd_notify, vcd);
}