cf3f9807da3945bd4d626dff6bcf1c8f446916a5

diff --git a/simavr/cores/sim_mega16.c b/simavr/cores/sim_mega16.c
index 2bd092db833143f5ec2c5509f78f1b64d2ecf174..aa3563d3a1c389cdb0d06014695da14ed2a59d1e 100644 (file)
--- a/simavr/cores/sim_mega16.c
+++ b/simavr/cores/sim_mega16.c
@@ -29,7 +29,25 @@
 
 #define ICP_PORT       PORTD
 #define ICP_PIN                6
-       
+
+#define OC0_PORT       PORTB
+#define OC0_PIN                3
+
+#define OC1A_PORT      PORTD
+#define OC1A_PIN       5
+
+#define OC1B_PORT      PORTD
+#define OC1B_PIN       4
+
+#define OC2_PORT       PORTD
+#define OC2_PIN                7
+
+#define EXT_CLOCK0_PORT        PORTB
+#define EXT_CLOCK0_PIN         0
+
+#define EXT_CLOCK1_PORT        PORTB
+#define EXT_CLOCK1_PIN         1
+
 #define _AVR_IO_H_
 #define __ASSEMBLER__
 #include "avr/iom16.h"

diff --git a/simavr/cores/sim_mega32.c b/simavr/cores/sim_mega32.c
index 4c5bc0514be9fc6991587bbcbdba8c489cdc72cb..e46b816895a84f22f8ca4091a8464eb73984d398 100644 (file)
--- a/simavr/cores/sim_mega32.c
+++ b/simavr/cores/sim_mega32.c
@@ -30,6 +30,24 @@
 #define ICP_PORT       PORTD
 #define ICP_PIN                6
 
+#define OC0_PORT       PORTB
+#define OC0_PIN                3
+
+#define OC1A_PORT      PORTD
+#define OC1A_PIN       5
+
+#define OC1B_PORT      PORTD
+#define OC1B_PIN       4
+
+#define OC2_PORT       PORTD
+#define OC2_PIN                7
+
+#define EXT_CLOCK0_PORT        PORTB
+#define EXT_CLOCK0_PIN         0
+
+#define EXT_CLOCK1_PORT        PORTB
+#define EXT_CLOCK1_PIN         1
+
 #define _AVR_IO_H_
 #define __ASSEMBLER__
 #include "avr/iom32.h"

diff --git a/simavr/cores/sim_mega8.c b/simavr/cores/sim_mega8.c
index 01c177dd5d6b2463374abdf11a894d0e43fc8255..925e06eec312b66066230e8d3612d8f54273024d 100644 (file)
--- a/simavr/cores/sim_mega8.c
+++ b/simavr/cores/sim_mega8.c
@@ -28,6 +28,21 @@
 #define ICP_PORT       PORTB
 #define ICP_PIN                0
 
+#define OC1A_PORT      PORTB
+#define OC1A_PIN       1
+
+#define OC1B_PORT      PORTB
+#define OC1B_PIN       2
+
+#define OC2_PORT       PORTB
+#define OC2_PIN                3
+
+#define EXT_CLOCK0_PORT        PORTD
+#define EXT_CLOCK0_PIN         4
+
+#define EXT_CLOCK1_PORT        PORTD
+#define EXT_CLOCK1_PIN         5
+
 #define _AVR_IO_H_
 #define __ASSEMBLER__
 #include "avr/iom8.h"

diff --git a/simavr/cores/sim_megax.h b/simavr/cores/sim_megax.h
index ceda0427023460bdbf63a78914816c55a0972dab..a6c14f8a20475fa562ad3735aab99a918693e65b 100644 (file)
--- a/simavr/cores/sim_megax.h
+++ b/simavr/cores/sim_megax.h
@@ -172,7 +172,9 @@ const struct mcu_t SIM_CORENAME = {
                        // CTC etc. are missing because atmega8 does not support them on timer0
                },
                .cs = { AVR_IO_REGBIT(TCCR0, CS00), AVR_IO_REGBIT(TCCR0, CS01), AVR_IO_REGBIT(TCCR0, CS02) },
-               .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */},
+               .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */, AVR_TIMER_EXTCLK_CHOOSE, AVR_TIMER_EXTCLK_CHOOSE  /* AVR_TIMER_EXTCLK_CHOOSE means External clock chosen*/},
+
+               .ext_clock_pin = AVR_IO_REGBIT(EXT_CLOCK0_PORT, EXT_CLOCK0_PIN),
 
                .r_tcnt = TCNT0,
 
@@ -181,7 +183,22 @@ const struct mcu_t SIM_CORENAME = {
                        .raised = AVR_IO_REGBIT(TIFR, TOV0),
                        .vector = TIMER0_OVF_vect,
                },
-               // Compare Output Mode is missing for timer0 as atmega8 does not support it
+#ifdef OC0_PORT
+               .comp = {
+                       [AVR_TIMER_COMPA] = {
+                               .r_ocr = OCR0,
+                               .com = AVR_IO_REGBITS(TCCR0, COM00, 0x3),
+                               .com_pin = AVR_IO_REGBIT(OC0_PORT, OC0_PIN),
+                               .interrupt = {
+                                       .enable = AVR_IO_REGBIT(TIMSK, OCIE0),
+                                       .raised = AVR_IO_REGBIT(TIFR, OCF0),
+                                       .vector = TIMER0_COMP_vect,
+                               },
+                       },
+               },
+#else
+// Compare Output Mode is missing for timer0 on atmega8
+#endif
        },
        .timer1 = {
                .name = '1',
@@ -202,7 +219,9 @@ const struct mcu_t SIM_CORENAME = {
                        [15] = AVR_TIMER_WGM_OCPWM(),
                },
                .cs = { AVR_IO_REGBIT(TCCR1B, CS10), AVR_IO_REGBIT(TCCR1B, CS11), AVR_IO_REGBIT(TCCR1B, CS12) },
-               .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */  /* TODO: 2 External clocks */},
+               .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */, AVR_TIMER_EXTCLK_CHOOSE, AVR_TIMER_EXTCLK_CHOOSE  /* AVR_TIMER_EXTCLK_CHOOSE means External clock chosen*/},
+
+               .ext_clock_pin = AVR_IO_REGBIT(EXT_CLOCK1_PORT, EXT_CLOCK1_PIN),
 
                .r_tcnt = TCNT1L,
                .r_icr = ICR1L,
@@ -227,7 +246,7 @@ const struct mcu_t SIM_CORENAME = {
                                .r_ocr = OCR1AL,
                                .r_ocrh = OCR1AH,       // 16 bits timers have two bytes of it
                                .com = AVR_IO_REGBITS(TCCR1A, COM1A0, 0x3),
-                               .com_pin = AVR_IO_REGBIT(PORTB, PB5),
+                               .com_pin = AVR_IO_REGBIT(OC1A_PORT, OC1A_PIN),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1A),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF1A),
@@ -238,7 +257,7 @@ const struct mcu_t SIM_CORENAME = {
                                .r_ocr = OCR1BL,
                                .r_ocrh = OCR1BH,
                                .com = AVR_IO_REGBITS(TCCR1A, COM1B0, 0x3),
-                               .com_pin = AVR_IO_REGBIT(PORTB, PB6),
+                               .com_pin = AVR_IO_REGBIT(OC1B_PORT, OC1B_PIN),
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE1B),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF1B),
@@ -274,7 +293,7 @@ const struct mcu_t SIM_CORENAME = {
                        [AVR_TIMER_COMPA] = {
                                .r_ocr = OCR2,
                                .com = AVR_IO_REGBITS(TCCR2, COM20, 0x3),
-                               .com_pin = AVR_IO_REGBIT(PORTB, PB7), // same as timer1C
+                               .com_pin = AVR_IO_REGBIT(OC2_PORT, OC2_PIN), // same as timer1C
                                .interrupt = {
                                        .enable = AVR_IO_REGBIT(TIMSK, OCIE2),
                                        .raised = AVR_IO_REGBIT(TIFR, OCF2),