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Commit
f2ebab47d69ee01d4c9f2cc04496e71665a8ab76
author
bsekisser
<squirmyworms@embarqmail.com>
Thu, 15 Oct 2015 18:24:43 +0000
(14:24 -0400)
committer
bsekisser
<squirmyworms@embarqmail.com>
Thu, 15 Oct 2015 18:24:43 +0000
(14:24 -0400)
several commits were pushed to a branch which I later split...
one commit had a dependency I missed which this fixes.
modified: sim/sim_core.c
fix missing dependance in MOVW instruction.
simavr/sim/sim_core.c
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diff --git
a/simavr/sim/sim_core.c
b/simavr/sim/sim_core.c
index 90ad12ec3cf8005f647074486d66eb44c04de300..05c707ebe90c5ef4a5c3141c67744cd43a124442 100644
(file)
--- a/
simavr/sim/sim_core.c
+++ b/
simavr/sim/sim_core.c
@@
-675,7
+675,8
@@
run_one_again:
uint8_t d = ((opcode >> 4) & 0xf) << 1;
uint8_t r = ((opcode) & 0xf) << 1;
STATE("movw %s:%s, %s:%s[%02x%02x]\n", avr_regname(d), avr_regname(d+1), avr_regname(r), avr_regname(r+1), avr->data[r+1], avr->data[r]);
- _avr_set_r16le(avr, d, _avr_data_read16le(avr, r));
+ uint16_t vr = avr->data[r] | (avr->data[r + 1] << 8);
+ _avr_set_r16le(avr, d, vr);
} break;
case 0x0200: { // MULS -- Multiply Signed -- 0000 0010 dddd rrrr
int8_t r = 16 + (opcode & 0xf);