From: Akos Kiss <akiss@inf.u-szeged.hu>
Date: Tue, 13 Oct 2020 22:11:03 +0000 (+0200)
Subject: Fix typos in comments in HD44780
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=03a01c70dc1b001d06729a2ad42ad2310585d32e;p=sx%2Fsimavr.git

Fix typos in comments in HD44780
---

diff --git a/examples/parts/hd44780.c b/examples/parts/hd44780.c
index 1d0da5d..7428be3 100644
--- a/examples/parts/hd44780.c
+++ b/examples/parts/hd44780.c
@@ -65,7 +65,7 @@ _hd44780_clear_screen(
 
 
 /*
- * This is called when the delay between operation is triggered
+ * This is called when the delay between operations is triggered
  * without the AVR firmware 'reading' the status byte. It
  * automatically clears the BUSY flag for the next command
  */
@@ -156,7 +156,7 @@ hd44780_write_command(
 		hd44780_t *b)
 {
 	uint32_t delay = 37; // uS
-	int top = 7;	// get highest bit set'm
+	int top = 7;	// get highest bit set
 	while (top)
 		if (b->datapins & (1 << top))
 			break;
@@ -164,7 +164,7 @@ hd44780_write_command(
 	printf("hd44780_write_command %02x\n", b->datapins);
 
 	switch (top) {
-		// Set	DDRAM address
+		// Set DDRAM address
 		case 7:		// 1 ADD ADD ADD ADD ADD ADD ADD
 			b->cursor = b->datapins & 0x7f;
 			if (hd44780_get_flag(b, HD44780_FLAG_N)) { // 2-line display
@@ -177,8 +177,8 @@ hd44780_write_command(
 					b->cursor = 0x00;
 			}
 			break;
-		// Set	CGRAM address
-		case 6:		// 0 1 ADD ADD ADD ADD ADD ADD ADD
+		// Set CGRAM address
+		case 6:		// 0 1 ACG ACG ACG ACG ACG ACG
 			b->cursor = 0x80 + (b->datapins & 0x3f);
 			break;
 		// Function	set
diff --git a/examples/parts/hd44780.h b/examples/parts/hd44780.h
index e359e6f..c165314 100644
--- a/examples/parts/hd44780.h
+++ b/examples/parts/hd44780.h
@@ -30,12 +30,12 @@
  * + As usual, the "RW" pin is optional if you are willing to wait for the
  *   specific number of cycles as per the datasheet (37uS between operations)
  * + If you decide to use the RW pin, the "busy" flag is supported and will
- *   be automaticly cleared on the second read, to exercisee the code a bit.
- * + Cursor is supported, but now "display shift"
+ *   be automatically cleared on the second read, to exercise the code a bit.
+ * + Cursor is supported, but no "display shift"
  * + The Character RAM is supported, but is not currently drawn.
  *
  * To interface this part, you can use the "INPUT" IRQs and hook them to the
- * simavr instance, if you use the RW pins or read back frim the display, you
+ * simavr instance, if you use the RW pins or read back from the display, you
  * can hook the data pins /back/ to the AVR too.
  *
  * The "part" also provides various IRQs that are there to be placed in a VCD file
@@ -77,13 +77,13 @@ enum {
     HD44780_FLAG_C,             // 1: Cursor on
     HD44780_FLAG_D,             // 1: Set Entire Display memory (for clear)
     HD44780_FLAG_S,             // 1: Follow display shift
-    HD44780_FLAG_I_D,			// 1: Increment, 0: Decrement
+    HD44780_FLAG_I_D,           // 1: Increment, 0: Decrement
 
     /*
      * Internal flags, not HD44780
      */
     HD44780_FLAG_LOWNIBBLE,		// 1: 4 bits mode, write/read low nibble
-    HD44780_FLAG_BUSY,			// 1: Busy between instruction, 0: ready
+    HD44780_FLAG_BUSY,			// 1: Busy between instructions, 0: ready
     HD44780_FLAG_REENTRANT,		// 1: Do not update pins
 
     HD44780_FLAG_DIRTY,			// 1: needs redisplay...
@@ -100,7 +100,7 @@ typedef struct hd44780_t
 	uint16_t cursor;			// offset in vram
 	uint8_t  vram[0x80 + 0x40];
 
-	uint16_t pinstate;			// 'actual' LCd data pins (IRQ bit field)
+	uint16_t pinstate;			// 'actual' LCD data pins (IRQ bit field)
 	// uint16_t oldstate;			/// previous pins
 	uint8_t	 datapins;			// composite of 4 high bits, or 8 bits
 	uint8_t  readpins;