From: bsekisser <squirmyworms@embarqmail.com>
Date: Mon, 12 Oct 2020 21:17:49 +0000 (-0400)
Subject: fixup
X-Git-Tag: v1.7~8^2
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=0d7783fe663723d3fb280435ecf5648afae78841;p=sx%2Fsimavr.git

fixup
---

diff --git a/simavr/sim/avr_uart.c b/simavr/sim/avr_uart.c
index b0b5770..55c1189 100644
--- a/simavr/sim/avr_uart.c
+++ b/simavr/sim/avr_uart.c
@@ -412,9 +412,9 @@ avr_uart_irq_input(
 		return;
 
 	// reserved/not implemented:
-	//avr_uart_regbit_clear(avr, p->fe);
-	//avr_uart_regbit_clear(avr, p->upe);
-	//avr_uart_regbit_clear(avr, p->rxb8);
+	//avr_regbit_clear(avr, p->fe);
+	//avr_regbit_clear(avr, p->upe);
+	//avr_regbit_clear(avr, p->rxb8);
 
 	if (uart_fifo_isempty(&p->input) &&
 			(avr_cycle_timer_status(avr, avr_uart_rxc_raise, p) == 0)