From: bsekisser <squirmyworms@embarqmail.com>
Date: Tue, 2 Jul 2013 17:02:15 +0000 (-0400)
Subject: sim_core.c: extended data type to 32 bits for eicall/eijmp instruction.
X-Git-Tag: v1.1~12^2
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=2386657c7dedfea8ddd4ea4c0bb5c9e59a14c1b6;p=sx%2Fsimavr.git

sim_core.c: extended data type to 32 bits for eicall/eijmp instruction.

	modified:   simavr/sim/sim_core.c
---

diff --git a/simavr/sim/sim_core.c b/simavr/sim/sim_core.c
index 6db0b87..03d46ff 100644
--- a/simavr/sim/sim_core.c
+++ b/simavr/sim/sim_core.c
@@ -846,7 +846,7 @@ avr_flashaddr_t avr_run_one(avr_t * avr)
 					int p = opcode & 0x100;
 					if (e && !avr->eind)
 						_avr_invalid_opcode(avr);
-					uint16_t z = avr->data[R_ZL] | (avr->data[R_ZH] << 8);
+					uint32_t z = avr->data[R_ZL] | (avr->data[R_ZH] << 8);
 					if (e)
 						z |= avr->data[avr->eind] << 16;
 					STATE("%si%s Z[%04x]\n", e?"e":"", p?"call":"jmp", z << 1);