From: Michel Pollet Date: Thu, 24 May 2018 08:58:57 +0000 (+0100) Subject: Merge pull request #280 from dgeelen/dgeelen/wrap_memory_accesses X-Git-Tag: v1.7~46 X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=46fe26009dc3fc321d799026e81567a3e3fda898;p=sx%2Fsimavr.git Merge pull request #280 from dgeelen/dgeelen/wrap_memory_accesses On actual hardware, memory accesses seem to wrap. --- 46fe26009dc3fc321d799026e81567a3e3fda898