From: Andreas Schultes <andreasschultes@users.noreply.github.com>
Date: Mon, 9 Oct 2017 07:59:08 +0000 (+0200)
Subject: use only 12 bits for ubrr (#257)
X-Git-Tag: v1.6~8
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=6a1a04a0a02467797ae7dbecc04b3ffe9452e7b0;p=sx%2Fsimavr.git

use only 12 bits for ubrr (#257)

* use only 12 bits for ubrr

* use bitmask for ubrr

* remove r_ubrr_h and r_ubrr_l
---

diff --git a/simavr/cores/sim_megaxm1.h b/simavr/cores/sim_megaxm1.h
index 6890fb5..6af2c1c 100644
--- a/simavr/cores/sim_megaxm1.h
+++ b/simavr/cores/sim_megaxm1.h
@@ -137,8 +137,7 @@ const struct mcu_t SIM_CORENAME = {
 			.r_ucsra = 0,
 			.r_ucsrb = 0,
 			.r_ucsrc = 0,
-			.r_ubrrl = 0,
-			.r_ubrrh = 0,
+
 
 			.rxc = {
 				.enable = AVR_IO_REGBIT(LINENIR, LENRXOK),
diff --git a/simavr/sim/avr_uart.c b/simavr/sim/avr_uart.c
index bde5cc0..4e3db86 100644
--- a/simavr/sim/avr_uart.c
+++ b/simavr/sim/avr_uart.c
@@ -240,7 +240,7 @@ avr_uart_baud_write(
 {
 	avr_uart_t * p = (avr_uart_t *)param;
 	avr_core_watch_write(avr, addr, v);
-	uint32_t val = avr->data[p->r_ubrrl] | (avr->data[p->r_ubrrh] << 8);
+	uint32_t val = avr_regbit_get(avr,p->ubrrl) | (avr_regbit_get(avr,p->ubrrh) << 8);
 
 	const int databits[] = { 5,6,7,8,  /* 'reserved', assume 8 */8,8,8, 9 };
 	int db = databits[avr_regbit_get(avr, p->ucsz) | (avr_regbit_get(avr, p->ucsz2) << 2)];
@@ -548,8 +548,8 @@ avr_uart_init(
 		avr_register_io_write(avr, p->udrc.enable.reg, avr_uart_write, p);
 	if (p->r_ucsra)
 		avr_register_io_write(avr, p->r_ucsra, avr_uart_write, p);
-	if (p->r_ubrrl)
-		avr_register_io_write(avr, p->r_ubrrl, avr_uart_baud_write, p);
+	if (p->ubrrl.reg)
+		avr_register_io_write(avr, p->ubrrl.reg, avr_uart_baud_write, p);
 	avr_register_io_write(avr, p->rxen.reg, avr_uart_write, p);
 }
 
diff --git a/simavr/sim/avr_uart.h b/simavr/sim/avr_uart.h
index f480385..107359e 100644
--- a/simavr/sim/avr_uart.h
+++ b/simavr/sim/avr_uart.h
@@ -111,7 +111,8 @@ typedef struct avr_uart_t {
 	avr_regbit_t	upe;		// parity error bit
 	avr_regbit_t	rxb8;		// receive data bit 8
 
-	avr_io_addr_t r_ubrrl,r_ubrrh;
+	avr_regbit_t	ubrrl;
+	avr_regbit_t	ubrrh;
 
 	avr_int_vector_t rxc;
 	avr_int_vector_t txc;
@@ -152,12 +153,13 @@ void avr_uart_init(avr_t * avr, avr_uart_t * port);
 		.usbs = AVR_IO_REGBIT(UCSR ## _name ## C, USBS ## _name), \
 		.ucsz = AVR_IO_REGBITS(UCSR ## _name ## C, UCSZ ## _name ## 0, 0x3), \
 		.ucsz2 = AVR_IO_REGBIT(UCSR ## _name ## B, UCSZ ## _name ## 2), \
-	\
+		.ubrrl = AVR_IO_REGBITS(UBRR ## _name ## L, 0,0xFF), \
+		.ubrrh = AVR_IO_REGBITS(UBRR ## _name ## H, 0,0xF), \
+		\
 		.r_ucsra = UCSR ## _name ## A, \
 		.r_ucsrb = UCSR ## _name ## B, \
 		.r_ucsrc = UCSR ## _name ## C, \
-		.r_ubrrl = UBRR ## _name ## L, \
-		.r_ubrrh = UBRR ## _name ## H, \
+	\
 		.rxc = { \
 			.enable = AVR_IO_REGBIT(UCSR ## _name ## B, RXCIE ## _name), \
 			.raised = AVR_IO_REGBIT(UCSR ## _name ## A, RXC ## _name), \
@@ -194,12 +196,13 @@ void avr_uart_init(avr_t * avr, avr_uart_t * port);
 		.usbs = AVR_IO_REGBIT(UCSR ## _rname_ix ## C, USBS ## _rname_ix), \
 		.ucsz = AVR_IO_REGBITS(UCSR ## _rname_ix ## C, UCSZ ## _rname_ix ## 0, 0x3), \
 		.ucsz2 = AVR_IO_REGBIT(UCSR ## _rname_ix ## B, UCSZ ## _rname_ix ## 2), \
+		.ubrrl = AVR_IO_REGBITS(UBRR ## _rname_ix ## L, 0,0xFF), \
+		.ubrrh = AVR_IO_REGBITS(UBRR ## _rname_ix ## H, 0,0xF), \
 	\
 		.r_ucsra = UCSR ## _rname_ix ## A, \
 		.r_ucsrb = UCSR ## _rname_ix ## B, \
 		.r_ucsrc = UCSR ## _rname_ix ## C, \
-		.r_ubrrl = UBRR ## _rname_ix ## L, \
-		.r_ubrrh = UBRR ## _rname_ix ## H, \
+	\
 		.rxc = { \
 			.enable = AVR_IO_REGBIT(UCSR ## _rname_ix ## B, RXCIE ## _rname_ix), \
 			.raised = AVR_IO_REGBIT(UCSR ## _rname_ix ## A, RXC ## _rname_ix), \