From: Doug Goldstein <cardoe@cardoe.com>
Date: Sun, 27 Apr 2014 15:43:17 +0000 (-0500)
Subject: cores: Fix ADCH and ADCL to use defines for RFA1
X-Git-Tag: v1.2~2^2~3
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=80e2c23f70d80ef39f5e956a773d2de39b369026;p=sx%2Fsimavr.git

cores: Fix ADCH and ADCL to use defines for RFA1

No current release provides these defines however they are fixed in
avr-libc trunk and as such we should use them if they are available.
---

diff --git a/simavr/cores/sim_mega128rfa1.c b/simavr/cores/sim_mega128rfa1.c
index 882a655..b25795a 100644
--- a/simavr/cores/sim_mega128rfa1.c
+++ b/simavr/cores/sim_mega128rfa1.c
@@ -184,8 +184,13 @@ const struct mcu_t {
 		.adate = AVR_IO_REGBIT(ADCSRA, ADATE),
 		.adps = { AVR_IO_REGBIT(ADCSRA, ADPS0), AVR_IO_REGBIT(ADCSRA, ADPS1), AVR_IO_REGBIT(ADCSRA, ADPS2),},
 
+#ifdef ADCL
+		.r_adch = ADCH,
+		.r_adcl = ADCL,
+#else
 		.r_adch = 0x79, //ADCH,
 		.r_adcl = 0x78, //ADCL,
+#endif
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},