From: Michel Pollet <github.com@pollet.net>
Date: Wed, 19 Nov 2014 09:23:43 +0000 (+0000)
Subject: Merge pull request #101 from dougszumski/mx_core_add_extint
X-Git-Tag: v1.3~58
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=81b78e08b96c795fa8bce83523526c6b09f822b5;p=sx%2Fsimavr.git

Merge pull request #101 from dougszumski/mx_core_add_extint

cores: Adds missing external interrupt for m16/m32
---

81b78e08b96c795fa8bce83523526c6b09f822b5
diff --cc simavr/cores/sim_megax.h
index c908e8e,0f65085..ceda042
--- a/simavr/cores/sim_megax.h
+++ b/simavr/cores/sim_megax.h
@@@ -88,13 -88,24 +88,16 @@@ const struct mcu_t SIM_CORENAME = 
  	.extint = {
  		AVR_EXTINT_DECLARE(0, 'D', PD2),
  		AVR_EXTINT_DECLARE(1, 'D', PD3),
+ #ifdef INT2
+ 		AVR_ASYNC_EXTINT_DECLARE(2, 'B', PB2),
+ #endif
  	},
  #ifdef PORTA
 -	.porta = {
 -		.name = 'A', .r_port = PORTA, .r_ddr = DDRA, .r_pin = PINA,
 -	},
 +	AVR_IOPORT_DECLARE(a, 'A', A),
  #endif
 -	.portb = {
 -		.name = 'B', .r_port = PORTB, .r_ddr = DDRB, .r_pin = PINB,
 -	},
 -	.portc = {
 -		.name = 'C', .r_port = PORTC, .r_ddr = DDRC, .r_pin = PINC,
 -	},
 -	.portd = {
 -		.name = 'D', .r_port = PORTD, .r_ddr = DDRD, .r_pin = PIND,
 -	},
 +	AVR_IOPORT_DECLARE(b, 'B', B),
 +	AVR_IOPORT_DECLARE(c, 'C', C),
 +	AVR_IOPORT_DECLARE(d, 'D', D),
  	.uart = {
  	   // no PRUSART .disabled = AVR_IO_REGBIT(PRR,PRUSART0),
  		.name = '0',