From: cskarai <cskarai@freemail.hu>
Date: Tue, 6 Jan 2015 20:32:01 +0000 (+0100)
Subject: Added: ADC trigger sources
X-Git-Tag: v1.3~57^2~2
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=8636d5ec8b8c66a1d46dc87681e66df5e5b452d9;p=sx%2Fsimavr.git

Added: ADC trigger sources
---

diff --git a/simavr/cores/sim_mega1280.c b/simavr/cores/sim_mega1280.c
index 63232d5..f5c0cfd 100644
--- a/simavr/cores/sim_mega1280.c
+++ b/simavr/cores/sim_mega1280.c
@@ -246,6 +246,16 @@ const struct mcu_t {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_mega1281.c b/simavr/cores/sim_mega1281.c
index 6048375..866e58d 100644
--- a/simavr/cores/sim_mega1281.c
+++ b/simavr/cores/sim_mega1281.c
@@ -174,6 +174,16 @@ const struct mcu_t {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_mega128rfa1.c b/simavr/cores/sim_mega128rfa1.c
index 5619380..6a2937a 100644
--- a/simavr/cores/sim_mega128rfa1.c
+++ b/simavr/cores/sim_mega128rfa1.c
@@ -188,6 +188,16 @@ const struct mcu_t {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_mega128rfr2.c b/simavr/cores/sim_mega128rfr2.c
index 1a7e6c4..0fe0035 100644
--- a/simavr/cores/sim_mega128rfr2.c
+++ b/simavr/cores/sim_mega128rfr2.c
@@ -214,6 +214,16 @@ const struct mcu_t {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_mega169.c b/simavr/cores/sim_mega169.c
index e7aeef3..30b387d 100644
--- a/simavr/cores/sim_mega169.c
+++ b/simavr/cores/sim_mega169.c
@@ -128,6 +128,16 @@ const struct mcu_t {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_mega2560.c b/simavr/cores/sim_mega2560.c
index 4e333fd..2d22b4f 100644
--- a/simavr/cores/sim_mega2560.c
+++ b/simavr/cores/sim_mega2560.c
@@ -248,6 +248,16 @@ const struct mcu_t {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			 [0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_megax8.h b/simavr/cores/sim_megax8.h
index 28d4def..d7d08b8 100644
--- a/simavr/cores/sim_megax8.h
+++ b/simavr/cores/sim_megax8.h
@@ -168,6 +168,16 @@ const struct mcu_t SIM_CORENAME = {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_1_compare_match_b,
+			[6] = avr_adts_timer_1_overflow,
+			[7] = avr_adts_timer_1_capture_event,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_megaxm1.h b/simavr/cores/sim_megaxm1.h
index fdb929d..cebceea 100644
--- a/simavr/cores/sim_megaxm1.h
+++ b/simavr/cores/sim_megaxm1.h
@@ -171,7 +171,23 @@ const struct mcu_t SIM_CORENAME = {
 		.r_adcl = ADCL,
 
 		.r_adcsrb = ADCSRB,
-		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2), AVR_IO_REGBIT(ADCSRB, ADTS3),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_external_interrupt_0,
+			[2] = avr_adts_timer_0_compare_match_a,
+			[3] = avr_adts_timer_0_overflow,
+			[4] = avr_adts_timer_1_compare_match_b,
+			[5] = avr_adts_timer_1_overflow,
+			[6] = avr_adts_timer_1_capture_event,
+			[7] = avr_adts_psc_module_0_sync_signal,
+			[8] = avr_adts_psc_module_1_sync_signal,
+			[9] = avr_adts_psc_module_2_sync_signal,
+			[10] = avr_adts_analog_comparator_0,
+			[11] = avr_adts_analog_comparator_1,
+			[12] = avr_adts_analog_comparator_2,
+			[13] = avr_adts_analog_comparator_3,
+		},
 
 		.muxmode = {
 			[0] = AVR_ADC_SINGLE(0), [1] = AVR_ADC_SINGLE(1),
diff --git a/simavr/cores/sim_tinyx4.h b/simavr/cores/sim_tinyx4.h
index 2ce12b3..879239b 100644
--- a/simavr/cores/sim_tinyx4.h
+++ b/simavr/cores/sim_tinyx4.h
@@ -110,6 +110,16 @@ const struct mcu_t SIM_CORENAME = {
 
         .r_adcsrb = ADCSRB,
         .adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+        .adts_op = {
+          [0] = avr_adts_free_running,
+          [1] = avr_adts_analog_comparator_0,
+          [2] = avr_adts_external_interrupt_0,
+          [3] = avr_adts_timer_0_compare_match_a,
+          [4] = avr_adts_timer_0_overflow,
+          [5] = avr_adts_timer_1_compare_match_b,
+          [6] = avr_adts_timer_1_overflow,
+          [7] = avr_adts_timer_1_capture_event,
+        },
         .bin = AVR_IO_REGBIT(ADCSRB, BIN),
 
         .muxmode = {
diff --git a/simavr/cores/sim_tinyx5.h b/simavr/cores/sim_tinyx5.h
index 44dbd06..cc88196 100644
--- a/simavr/cores/sim_tinyx5.h
+++ b/simavr/cores/sim_tinyx5.h
@@ -102,6 +102,16 @@ const struct mcu_t SIM_CORENAME = {
 
 		.r_adcsrb = ADCSRB,
 		.adts = { AVR_IO_REGBIT(ADCSRB, ADTS0), AVR_IO_REGBIT(ADCSRB, ADTS1), AVR_IO_REGBIT(ADCSRB, ADTS2),},
+		.adts_op = {
+			[0] = avr_adts_free_running,
+			[1] = avr_adts_analog_comparator_0,
+			[2] = avr_adts_external_interrupt_0,
+			[3] = avr_adts_timer_0_compare_match_a,
+			[4] = avr_adts_timer_0_overflow,
+			[5] = avr_adts_timer_0_compare_match_b,
+			[6] = avr_adts_pin_change_interrupt,
+		},
+		
 		.bin = AVR_IO_REGBIT(ADCSRB, BIN),
 		.ipr = AVR_IO_REGBIT(ADCSRA, IPR),
 
diff --git a/simavr/sim/avr_adc.h b/simavr/sim/avr_adc.h
index e1e75d1..4257312 100644
--- a/simavr/sim/avr_adc.h
+++ b/simavr/sim/avr_adc.h
@@ -80,6 +80,27 @@ enum {
 	ADC_VREF_V256	= 2560,
 };
 
+// ADC trigger sources
+typedef enum {
+	avr_adrs_invalid = 0,
+	avr_adts_free_running,
+	avr_adts_analog_comparator_0,
+	avr_adts_analog_comparator_1,
+	avr_adts_analog_comparator_2,
+	avr_adts_analog_comparator_3,
+	avr_adts_external_interrupt_0,
+	avr_adts_timer_0_compare_match_a,
+	avr_adts_timer_0_compare_match_b,
+	avr_adts_timer_0_overflow,
+	avr_adts_timer_1_compare_match_b,
+	avr_adts_timer_1_overflow,
+	avr_adts_timer_1_capture_event,
+	avr_adts_pin_change_interrupt,
+	avr_adts_psc_module_0_sync_signal,
+	avr_adts_psc_module_1_sync_signal,
+	avr_adts_psc_module_2_sync_signal,
+} avr_adts_type;
+
 typedef struct avr_adc_t {
 	avr_io_t		io;
 
@@ -101,7 +122,8 @@ typedef struct avr_adc_t {
 	uint8_t			r_adcl, r_adch;	// Data Registers
 
 	uint8_t			r_adcsrb;	// ADC Control and Status Register B
-	avr_regbit_t	adts[3];	// Timing Source
+	avr_regbit_t	adts[4];	// Timing Source
+	avr_adts_type	adts_op[16];    // ADTS type
 	avr_regbit_t 	bin;		// Bipolar Input Mode (tinyx5 have it)
 	avr_regbit_t 	ipr;		// Input Polarity Reversal (tinyx5 have it)