From: Michel Pollet <buserror@gmail.com>
Date: Thu, 24 Feb 2011 18:01:40 +0000 (+0000)
Subject: regbits: Added a "raw" variant to get/set
X-Git-Tag: v1.0a7~8
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=9b9582d7653649bde0a960cfb21574a1a57ae63c;p=sx%2Fsimavr.git

regbits: Added a "raw" variant to get/set

Allows comparing to "real life" constants, used in Twi module

Signed-off-by: Michel Pollet <buserror@gmail.com>
---

diff --git a/simavr/sim/sim_regbit.h b/simavr/sim/sim_regbit.h
index 8325d63..9f2987a 100644
--- a/simavr/sim/sim_regbit.h
+++ b/simavr/sim/sim_regbit.h
@@ -71,6 +71,19 @@ static inline uint8_t avr_regbit_setto(avr_t * avr, avr_regbit_t rb, uint8_t v)
 	return (avr->data[a] >> rb.bit) & rb.mask;
 }
 
+/*
+ * Set the 'raw' bits, if 'v' is the unshifted value of the bits
+ */
+static inline uint8_t avr_regbit_setto_raw(avr_t * avr, avr_regbit_t rb, uint8_t v)
+{
+	uint8_t a = rb.reg;
+	if (!a)
+		return 0;
+	uint8_t m = rb.mask << rb.bit;
+	avr_core_watch_write(avr, a, (avr->data[a] & ~(m)) | ((v) & m));
+	return (avr->data[a]) & (rb.mask << rb.bit);
+}
+
 static inline uint8_t avr_regbit_get(avr_t * avr, avr_regbit_t rb)
 {
 	uint8_t a = rb.reg;
@@ -80,6 +93,18 @@ static inline uint8_t avr_regbit_get(avr_t * avr, avr_regbit_t rb)
 	return (avr->data[a] >> rb.bit) & rb.mask;
 }
 
+/*
+ * Return the bit(s) 'in position' instead of zero based
+ */
+static inline uint8_t avr_regbit_get_raw(avr_t * avr, avr_regbit_t rb)
+{
+	uint8_t a = rb.reg;
+	if (!a)
+		return 0;
+	//uint8_t m = rb.mask << rb.bit;
+	return (avr->data[a]) & (rb.mask << rb.bit);
+}
+
 static inline uint8_t avr_regbit_clear(avr_t * avr, avr_regbit_t rb)
 {
 	uint8_t a = (rb.reg);