From: Michel Pollet <buserror@gmail.com>
Date: Sun, 14 Jun 2015 09:42:50 +0000 (+0100)
Subject: cores: Added TIMER2_COMPB to m2560
X-Git-Tag: v1.3~23
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=b64300059875cfd053f321226348b340c5de97dc;p=sx%2Fsimavr.git

cores: Added TIMER2_COMPB to m2560

This was commented out, dunno why..

Signed-off-by: Michel Pollet <buserror@gmail.com>
---

diff --git a/simavr/cores/sim_mega2560.c b/simavr/cores/sim_mega2560.c
index 2d22b4f..c0ed603 100644
--- a/simavr/cores/sim_mega2560.c
+++ b/simavr/cores/sim_mega2560.c
@@ -462,16 +462,16 @@ const struct mcu_t {
 					},
 			 },
 				// TIMER2_COMPB is only appeared in 2560
-			 //[AVR_TIMER_COMPB] = {
-			 //	.r_ocr = OCR2B,
-			 //	.com = AVR_IO_REGBITS(TCCR2A, COM2B0, 0x3),
-			 //	.com_pin = AVR_IO_REGBIT(PORTH, PH6),
-			 //	.interrupt = {
-			 //		.enable = AVR_IO_REGBIT(TIMSK2, OCIE2B),
-			 //		.raised = AVR_IO_REGBIT(TIFR2, OCF2B),
-			 //		.vector = TIMER2_COMPB_vect,
-			 //	},
-			 //},
+			 [AVR_TIMER_COMPB] = {
+			 	.r_ocr = OCR2B,
+			 	.com = AVR_IO_REGBITS(TCCR2A, COM2B0, 0x3),
+			 	.com_pin = AVR_IO_REGBIT(PORTH, PH6),
+			 	.interrupt = {
+			 		.enable = AVR_IO_REGBIT(TIMSK2, OCIE2B),
+			 		.raised = AVR_IO_REGBIT(TIFR2, OCF2B),
+			 		.vector = TIMER2_COMPB_vect,
+			 	},
+			 },
 		},
 	},
 	.timer3 = {