From: Aleksey Shargalin <myokaski@gmail.com>
Date: Thu, 21 Jun 2018 15:24:31 +0000 (+0300)
Subject: Fix receiving after fifo overrun
X-Git-Tag: v1.7~40^2
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=bb75b1df4ec7b19cc26a4fdd7cb7d770ed2f454a;p=sx%2Fsimavr.git

Fix receiving after fifo overrun

After fifo overrun buffer_done remains less than buffer_len and
FD_SET(p->port[ti].s, &read_set) is not called. If firmware has nothing
to send, select always returns 0 and new data is never read even if
fifo buffer gets flushed.
This patch removes check for select timeout, so the remaining data in
buffer may go to fifo.
---

diff --git a/examples/parts/uart_pty.c b/examples/parts/uart_pty.c
index 632dbdc..3282ac9 100644
--- a/examples/parts/uart_pty.c
+++ b/examples/parts/uart_pty.c
@@ -175,8 +175,6 @@ uart_pty_thread(
 		struct timeval timo = { 0, 500 };
 		int ret = select(max+1, &read_set, &write_set, NULL, &timo);
 
-		if (!ret)
-			continue;
 		if (ret < 0)
 			break;