From: Michel Pollet <buserror@gmail.com>
Date: Mon, 7 Nov 2016 08:31:40 +0000 (+0000)
Subject: cores: fix for 1284p timer block
X-Git-Tag: v1.4~8
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=cbcfc90881bdfd517095b49d246da6c21ae04460;p=sx%2Fsimavr.git

cores: fix for 1284p timer block

This is the 'approved' way to deal with optional peripherals. Check the
name, or check a register 'address' value for != 0 instead of trying to
use #ifdefs

Signed-off-by: Michel Pollet <buserror@gmail.com>
---

diff --git a/simavr/cores/sim_megax4.c b/simavr/cores/sim_megax4.c
index 54f0d96..2d12208 100644
--- a/simavr/cores/sim_megax4.c
+++ b/simavr/cores/sim_megax4.c
@@ -26,7 +26,7 @@
 void mx4_init(struct avr_t * avr)
 {
 	struct mcu_t * mcu = (struct mcu_t*)avr;
-	
+
 	avr_eeprom_init(avr, &mcu->eeprom);
 	avr_flash_init(avr, &mcu->selfprog);
 	avr_extint_init(avr, &mcu->extint);
@@ -41,9 +41,9 @@ void mx4_init(struct avr_t * avr)
 	avr_timer_init(avr, &mcu->timer0);
 	avr_timer_init(avr, &mcu->timer1);
 	avr_timer_init(avr, &mcu->timer2);
-#ifdef PRR1
-	avr_timer_init(avr, &mcu->timer3);
-#endif
+	if (mcu->timer3.name) // only resent on 1284
+		avr_timer_init(avr, &mcu->timer3);
+
 	avr_spi_init(avr, &mcu->spi);
 	avr_twi_init(avr, &mcu->twi);
 }
diff --git a/simavr/cores/sim_megax4.h b/simavr/cores/sim_megax4.h
index 2d1abcb..2fdef5a 100644
--- a/simavr/cores/sim_megax4.h
+++ b/simavr/cores/sim_megax4.h
@@ -51,9 +51,7 @@ struct mcu_t {
 	avr_uart_t		uart0,uart1;
 	avr_adc_t		adc;
 	avr_timer_t		timer0,timer1,timer2;
-#ifdef PRR1
 	avr_timer_t 	timer3;
-#endif
 	avr_spi_t		spi;
 	avr_twi_t		twi;
 };
@@ -364,10 +362,10 @@ const struct mcu_t SIM_CORENAME = {
 		.cs_div = { 0, 0, 3 /* 8 */, 5 /* 32 */, 6 /* 64 */, 7 /* 128 */, 8 /* 256 */, 10 /* 1024 */ },
 
 		.r_tcnt = TCNT2,
-		
+
 		// asynchronous timer source bit.. if set, use 32khz frequency
 		.as2 = AVR_IO_REGBIT(ASSR, AS2),
-		
+
 		.overflow = {
 			.enable = AVR_IO_REGBIT(TIMSK2, TOIE2),
 			.raised = AVR_IO_REGBIT(TIFR2, TOV2),