From: Michel Pollet <buserror@gmail.com>
Date: Wed, 27 Nov 2013 16:42:45 +0000 (+0000)
Subject: cores: Added mega16
X-Git-Tag: v1.2~53
X-Git-Url: https://git.htl-mechatronik.at/public/?a=commitdiff_plain;h=ef9ffe72c131ac1ab8bb28569f1ad50c59e2dff2;p=sx%2Fsimavr.git

cores: Added mega16

No idea why it wasn't there already. Uncommon part.

Signed-off-by: Michel Pollet <buserror@gmail.com>
---

diff --git a/simavr/cores/sim_mega16.c b/simavr/cores/sim_mega16.c
new file mode 100644
index 0000000..bf2ecb1
--- /dev/null
+++ b/simavr/cores/sim_mega16.c
@@ -0,0 +1,45 @@
+/*
+	sim_mega16.c
+
+	Copyright 2008, 2009 Michel Pollet <buserror@gmail.com>
+
+ 	This file is part of simavr.
+
+	simavr is free software: you can redistribute it and/or modify
+	it under the terms of the GNU General Public License as published by
+	the Free Software Foundation, either version 3 of the License, or
+	(at your option) any later version.
+
+	simavr is distributed in the hope that it will be useful,
+	but WITHOUT ANY WARRANTY; without even the implied warranty of
+	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+	GNU General Public License for more details.
+
+	You should have received a copy of the GNU General Public License
+	along with simavr.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+// atmega32 has different name for Watchdog Turn-off Enable register 
+#define WDCE WDTOE
+#include "sim_avr.h"
+
+#define SIM_VECTOR_SIZE	4
+#define SIM_MMCU		"atmega16"
+#define SIM_CORENAME	mcu_mega16
+
+#define _AVR_IO_H_
+#define __ASSEMBLER__
+#include "avr/iom16.h"
+// instantiate the new core
+#include "sim_megax.h"
+
+static avr_t * make()
+{
+	return avr_core_allocate(&SIM_CORENAME.core, sizeof(struct mcu_t));
+}
+
+avr_kind_t mega16 = {
+	.names = { "atmega16", },
+	.make = make
+};
+