elf: Fix elf_copy_section
How this ever worked is a wonder
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Add RAMPZ for the 1284p core
That was missing, fixes Issue #186
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Some more spacing issues
geany catches stray spaces
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #173 from hovercraft-github/timers-ext-clock
Add external clock pin definition and external clocking for timers.
Timers: fixes #177 (interrupt flags reset failure)
Timers: fixes #178, add timer external clock pin definition for megax cores.
Timers: added support for external clock input via a pin (Tn, TOSC1),
a variable frequency for virtual external clock sources including as2 asynchronous clock,
IO control for selecting external clock source and frequency,
external clock pin definition for most cores.
core: Fix rjmp/rcall wrapping around flash boundaries
As per PR #127, spliced
Signed-off-by: Michel Pollet <buserror@gmail.com>
regbits: Added attribute unused
As per pull request #127
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Spacing issues fixed
Trailing spaces removed
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: fix for 1284p timer block
This is the 'approved' way to deal with optional peripherals. Check the
name, or check a register 'address' value for != 0 instead of trying to
use #ifdefs
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #181 from messani/master
Timer fix
casting to uint64_t instead of float
renamed variable cs_div_clock to cs_div_value
Merge pull request #180 from hovercraft-github/sim_gdb_fix
sim_gdb: fix for restore callbacks issue
sim_gdb: fix for restore callbacks issue
Merge pull request #172 from Lotharyx/master
Improve usage message by not listing cores by default
Changed "-list-cores" and "-help" to "--list-cores" and "--help" respectively
Formatted the usage statement to include variants (e.g. -gdb, -g; -trace, -t)
mmcu: add helper macro for sending multi-byte commands
Add helper macro SEND_SIMAVR_CMD() for sending multi-byte commands
in one line. The macro makes use of involved preprocessor trickery to
achieve recursion.
cmds: rewrite command handling and move to separate file
Move AVR command handling code to separate file and add support for
multi-byte, as well as user-defined, commands.
(cherry picked from commit
c627c3720a6dcb1f8f7a3068510f11e3fbee0ce4)
Merge pull request #165 from inio/trace_port
Provide IRQs on PORT register when updated via PIN
elf: check for error instead of crashing
Check for error when allocating memory instead of dereferencing a NULL
pointer later in the program.
(cherry picked from commit
b3ecaf43cba921c6a257132093107771074ab749)
Conflicts:
simavr/sim/sim_elf.c
elf: Clean up code duplication and fix a cast
Use the helper function elf_copy_section() to get rid of some code
duplication and use the correct printf() type so that there is no cast
necessary.
Conflicts:
simavr/sim/sim_elf.c
elf: Wire up support for Fuses and Lock Bits
Support reading fuses and lock bits from ELF files and loading them into
the simavr internals for later use.
cores: Add a field for Lock Bits and Boot Lock Bits
Add an extra byte for allowing simavr store the chip's lock bits / boot
lock bits as well as set the default value as defined in a number of
specs.
cores: Fix fuse support to handle proper byte size
avr-libc specifies platforms with only 6, 3, 2, 1, and 0 bytes of fuses.
Previously simavr only had 4 bytes available for fuses and assumed any
platform using the CORE_DECLARE macro would have 3 fuses. This change
allows the CORE_DECLARE macro to support any of the platforms supported
by avr-libc with regard to fuses. Additionally add some defines to make
it clear for users of simavr what order the fuses are in.
Merge pull request #176 from hovercraft-github/ext_int_level_triggering
Triggering by level for external interrupts
Merge pull request #161 from obra/patch-1
Small but crucial fix to Homebrew install instructions
Merge pull request #155 from neosilky/fix-memleak
Fix a small memory leak when returning after an error
Implement triggering by level for external interrupts. Fixes bug with Sense Control Bits number detection.
Embettered the usage statement; changed "--list-cores" to "-list-cores" to match "-help"
Removed core list from default usage message; added "--list-cores" command-line flag to list cores
timer: fix calculation of comp_cycles
- bsekisser was right, there must be ocr+1
timer: fixed calculation of divider when using asynchronous 32kHz timer
timer: fixed overflow and output capture interrupts
Provide IRQs on PORT register when updated via PIN
Fixes issue #164
Merge pull request #128 from Zirias/threadsafe-console
make console output thread-safe (q&d)
make console output thread-safe
Merge pull request #154 from squell/master
added ELPM instruction with implied r0 register (opcode 1001 0101 110…
Small but crucial fix to Homebrew install instructions
Merge pull request #158 from dougszumski/feature/ds1338_real_time_clock_part
Feature/ds1338 real time clock part
examples: TWI driver used by the DS1338 RTC demo
examples: take the DS1338 virtual real time clock for a test drive
This demo consists of a DS1338 RTC connected via the TWI bus of an
atmega32. The square wave output of the DS1338 is enabled, with the
tick-rate set to 1HZ. This is then fed to pin D3 on the atmega32
which is configured to generate an interrupt on a rising edge. When
the interrupt fires the time is read from the DS1338.
parts: DS1338 real time clock which runs on the TWI bus
Features:
> External oscillator synced to the AVR core
> Square wave output with scalable frequency
> Leap year correction until 2100 (just like the real thing!)
Should also work for the pin compatible DS1307 device, but that part
hasn't been tested against actual hardware.
Fix a small memory leak when returning after an error
added ELPM instruction with implied r0 register (opcode 1001 0101 1101 1000)
Merge pull request #148 from jedahan/install-instructions
Add install instructions
Merge pull request #149 from jedahan/homebrew-prefix
Allow for homebrew installed avr-gcc to any prefix
Merge pull request #152 from stevedrake/macports-support
Update support for building with MacPorts
Merge pull request #153 from stevedrake/fix-sleep-1s
Support sleep interval of 1s or greater in gdb
build: updated support for building with MacPorts
Updated Macports support based on Homebrew support. Set correct paths
for MacPorts-provided avr-gcc and libelf.
gdb: support sleep interval of 1s or greater
Split sleep interval into seconds and microseconds to create a valid
timeval to pass as the timeout to select().
Removed comment, which refers to old code that used a fixed interval.
Allow for homebrew installed avr-gcc to any prefix
Merge pull request #145 from xqms/interrupt_fifo_fix
sim_interrupts: fix FIFO move operation
sim_interrupts: fix FIFO move operation
The variable 'mini' is a FIFO index, not a direct index into the buffer!
Add the current read pointer to fix the operation.
Fixes a regression introduced in
599733f261f94317489c2cc8751fb84fd604e6fa.
Merge pull request #141 from bsekisser/bsekisser-master-core-access-r16-fixup
core: fixup missing dependancy from r16 commit
core: fixup missing dependancy from r16 commit
several commits were pushed to a branch which I later split...
one commit had a dependency I missed which this fixes.
modified: sim/sim_core.c
fix missing dependance in MOVW instruction.
Merge pull request #135 from bsekisser/bsekisser-master-timer-clear-cancel-changes
avr_timer: add avr_timer_clear_and_cancel_all_cycle_timers
Merge pull request #134 from bsekisser/bsekisser-master-core-access-r16
core: add pair of 16 bit set register functions
timer: rework timer clear commit.
reworked to use single function with const flag to clear.
set to inline, depends on dce.
modified: sim/avr_timer.c
Merge pull request #133 from bsekisser/bsekisser-master-core-access-flash16
core: change 16 bit flash access
avr_timer: add avr_timer_clear_and_cancel_all_cycle_timers
modified: sim/avr_timer.c
added: avr_timer_clear_and_cancel_all_cycle_timers
fixes a few oversights in original commit(s)
core: add pair of 16 bit set register functions
added: _avr_set_r16le and _avr_set_r16le_hl
_avr_set_r16le_hl preserves reverse register set order where used
two register set calls become a single call.
core: change 16 bit flash access
modified: sim/sim_core.c
added _avr_flash_read16le accessor function
changed "avr->flash[addr] | (avr->flash[addr + 1] << 8)"
to "_avr_flash_read16le(avr, addr)"
ioport: Don't crash if core defition is incomplete
This is not something that happends on existing cores, but can be
annoying when defining a new one.
Signed-off-by: Michel Pollet <buserror@gmail.com>
io: No functional changes
Just reformating
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Added a selective trace option
Allows tracing one timer only
Signed-off-by: Michel Pollet <buserror@gmail.com>
arduidio: Simplified pin mapping
Again...
Signed-off-by: Michel Pollet <buserror@gmail.com>
timers: Gratuitous realignment
Go on with the new, improved narrow codestyle
Signed-off-by: Michel Pollet <buserror@gmail.com>
ADC: Skip SRB register if not present
the mega8/16/32 don't have ADCSRB, this lead to a crash when we tried to
register a callback on it.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Mega 8/16/32 and PORTA
Still register portA, regardless of PORTA constant initialisation
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Gratuitous realignment
ODC got the better of me
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Converted to use the standard fifo
There's already a standard way to make FIFO's, so converted the
interrupt code to use that.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added support for mega324a / pa..
Support for the renamed SPI block, somehow my headers (debian) don't
have any definition of a second one, but, the macro /should/ support it
now.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #130 from TheCrazyT/twi_i2c_write_fix
Twi i2cwrite fix
fix for wrong return value of i2c_write.
Merge pull request #1 from dougszumski/twi_delay_fix
twi: Remove start condition delay
Merge pull request #126 from ddaygold/typo
Fixed a typo in the manual
Fixed a typo in the manual
Merge pull request #124 from frej/enable-adc-for-atiny13
cores: Add ADC to the ATtiny13
cores: Add ADC to the ATtiny13
gdb: Cleanup
Also make sure we mask of only 24 bits of the address, newer gdb use one
somehow..
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added TIMER2_COMPB to m2560
This was commented out, dunno why..
Signed-off-by: Michel Pollet <buserror@gmail.com>
ihex: Streamlined implementation
Use ihex_read_chunk to implement ihex_read_file, and add a
ihex_free_chuncks for consistency sake
Signed-off-by: Michel Pollet <buserror@gmail.com>
avr: Add a 'reset pc' that can be nonzero
This allows the AVR to soft reset into the bootloader for example.
A watchdog reset will re-run the bootloader with the correct flag.
Signed-off-by: Michel Pollet <buserror@gmail.com>
watchdog: Some cleanup
No functional changes
Signed-off-by: Michel Pollet <buserror@gmail.com>
hex: Supports offsets larger then 64/128KB
New segemnt type for loading atmega2560 bootloaders
Signed-off-by: Michel Pollet <buserror@gmail.com>
simduino: Simplified, made compatible with m2560
Allow testing on atmega256 bootloader too.
Signed-off-by: Michel Pollet <buserror@gmail.com>
avr: Renamed special_* core fields
Added a 'custom' sub struct
Signed-off-by: Michel Pollet <buserror@gmail.com>
Whitespaces at end of line removed..
Dunno how these came to be..
Signed-off-by: Michel Pollet <buserror@gmail.com>
elf: Detect start address (for bootloaders)
Allows loading a bootloader ELF as well as .hex with the right starting
PC
Signed-off-by: Michel Pollet <buserror@gmail.com>
vcd: Prevent crash when close() is called twice
flahs() wasn't checking for a valid file pointer
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Redone the logic of delivery
Simplified a few expressions
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Now track pending and running states
Introduced two new IRQs per vector; one to track pending, and one to
track running state. So you can see any latency issues.
Also introduced a global pending/running IRQ, so you can track issues if
your interrupts overrun etc.
It is reasonably transparent, and seems to have had little impact on the
rest of the code... Hooray for nice clean APIs!
Signed-off-by: Michel Pollet <buserror@gmail.com>
vcd: Increased limits
Turns out it's easy to reach 32 if you try hard enough!
Signed-off-by: Michel Pollet <buserror@gmail.com>
twi: Revert to NO_STATE after a stop
Otherwise the interrupt might get re-triggered
Signed-off-by: Michel Pollet <buserror@gmail.com>
adc: Removed spurious trace
Accidentally commited this earlier
Signed-off-by: Michel Pollet <buserror@gmail.com>
arduidiot: Further pinout tweaks for 256's
Endless tweaks
Signed-off-by: Michel Pollet <buserror@gmail.com>
twi: Always release STOP bit
Seems some libraries assume this bit will autoclear, even if
the stop condition was not really called for.
Signed-off-by: Michel Pollet <buserror@gmail.com>
projects / sx / simavr.git / log