Use ffs() for finding timers from cycle timer map.
This optimization speeds up avr_cycle_timer_process() considerably. It
used to be a major bottleneck in my test case (52% of CPU time spent
in that routine), now it's about half that.
Return zeros when GDB reads just past end of stack.
GDB likes to read the topmost value of stack when using the
"stepi" (step instruction) command. Unfortunately this does not work
when the stack is empty, causing an error message and GDB confusion.
Hack the GDB stub code to just return zeros if GDB tries to read two
bytes just past the end of stack.
NOTE: This may need to be modified to support also longer reads for
bigger AVRs where code pointers are longer than two bytes (e.g.
ATMega2560). As simavr doesn't support atm2560 yet, I'm implementing
it this way now.
Enable interrupt handling for Fast PWM timers too
Arduino seems to use that.
UART: Fixed UDRC/E behaviour
The interrupt is suposed to fire as soon as it is
enabled is the UDR is empty.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cycle timers: Added avr_cycle_timer_status()
Allows verification wether a timer is running, and
until when it is.
Signed-off-by: Michel Pollet <buserror@gmail.com>
simduino: added init/deinit functions for avr_t initialization
fixes a crash (free of mmap'ed memory)
nicer cleanup by munmap + close the file
Signed-off-by: Christian Balles <code@ballessay.de>
core: added extra init/deinit functions to avr_t
allows programs like the simduino example to modify the init/deinit function
to fix a crash
Signed-off-by: Christian Balles <code@ballessay.de>
misc: Typos
Fixed a few comments
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Added a bit of documentation
Fixed some of the copy/paste errors in comments
Signed-off-by: Michel Pollet <buserror@gmail.com>
gdb: Adds the 'reset' command
Apparently needed for compatibility with AVRStudio debugger
Signed-off-by: Michel Pollet <buserror@gmail.com>
console: Implement debug console register
Used in pair with the console register declaration, just
prints what's sent to that debug register.
Signed-off-by: Michel Pollet <buserror@gmail.com>
mcu_section: Added New CONSOLE Tag
CONSOLE tag allow declaring a register for dumping debug output
oh the terminal without using an UART
Also cleaned up and documented the header file further
Signed-off-by: Michel Pollet <buserror@gmail.com>
tests: Update them so they work...
They relied on bugs that were fixed in simavr since..
Signed-off-by: Michel Pollet <buserror@gmail.com>
IOs: Use new IRQ alloc function
All converted to the brand new way...
Signed-off-by: Michel Pollet <buserror@gmail.com>
IRQs: A bit of sanity when freeing
Check the parameters...
Signed-off-by: Michel Pollet <buserror@gmail.com>
simavr: Deallocate resources
Deallocate memory and IO modules at teardown
Signed-off-by: Michel Pollet <buserror@gmail.com>
eeprom: Added a dealloc function
frees the eeprom memory at teardown time
Signed-off-by: Michel Pollet <buserror@gmail.com>
ios: Added a way to set and teardown modules IRQs
Added a function to set the io module IRQ, and added a way
to deallocate them at teardown time.
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Made (most) of the headers c++ friendly
No functional changes
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Fixed clang static analizer warnings
One genuine bug too. The rest was cosmetic.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioport: Added an IRQ for the port pin direction changes
New IRQ for client code (ie "board code") will be called
when the AVR firmware changes the DDR register.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioport: Add an ioctl to get the port state
Example:
for (int i = 'A'; i <= 'F'; i++) { avr_ioport_state_t state;
if (avr_ioctl(AVR_IOCTL_IOPORT_GETSTATE(i), &state) == 0)
printf("PORT%c %02x DDR %02x PIN %02x\n",
state.name, state.port, state.ddr, state.pin);
}
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Typos etc
Makefile now uses $(CC) so it works with clang static analyzer.
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: CALL/RET instructions fix
Swap LSB and MSB of return address on the stack.
Thanks to "Peter" on the simavr mailing list.
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Add PORTA support for Attiny2313
The Attiny2313 has a PORTA, the pins for it are normally used for
reset and the crystal, but it is possible to use them if you use the
internal R/C oscilator.
Simavr didn't support this port on a Attiny2313 yet, so I added it myself.
Signed-off-by: Wander Winkelhorst <w.winkelhorst@gmail.com>
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Fix for older AVRs & tinies
They lack WGM bits
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Fix SBRS/C for 32 bits instructions
Untested, but matches the datasheet
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Fix MULS register
MULS uses 16+ registers.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ADC: Fix ADLAR bit handling
Was shifting when zero, not one.
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Also reconfigure on writing the WGM bits
Some broken code configure the clock source before
setting the waveform bits.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioports: Cleanup and implement PINx toggle
Turns out writing 1 to PINx register toggles the
bit in PORTx. Did'nt know it worked like that...
Signed-off-by: Michel Pollet <buserror@gmail.com>
uart: Now use avr_clear_interrupt_if
New function simplifies clearing pending bits
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Allow clearing of the interupts
Allow exclicit clearing of interupts by writing 1
to the pending bit.
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Mark interupts as pending even if not enabled...
.. Then trigger them as soon as they are enabled again
There is a bit of performance hit on this, since the bitmask
array used before can now be full of pending bits that won't
ever be cleared..
Signed-off-by: Michel Pollet <buserror@gmail.com>
ICP: Added Input capture pin support to timers
Added (untested as of now) Input Pin Capture to the 16 bits
timers. The "edge" flag is also handled. The code is untested
for now, it will need an "example" board that will be
checked in later.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added tinyX5 and mega128 ADC bits
Not tested
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Warning fix
Makes gcc happy
Signed-off-by: Alessio Igor Bogani <abogani@texware.it>
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: More warning fixes
#warning "This file has been moved to <util/delay.h>."
Signed-off-by: Alessio Igor Bogani <abogani@texware.it>
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Fix warning replacing %d with %zu for size_t
Warning fixes.
Signed-off-by: Alessio Igor Bogani <abogani@texware.it>
Signed-off-by: Michel Pollet <buserror@gmail.com>
doc: Updated callgraph .pdf
Hadn't been updated for some time...
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Fixes SBCI
Thanks to <evgeny.chukreev@gmail.com>
Signed-off-by: Michel Pollet <buserror@gmail.com>
test: Add a test/example for the ADC subsystem
Loads ADC values, also reads the V1.1 reference voltage of an Atmega644
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Add (some) of the ADC mux data
Add ADC Mux data to the x8 and x4 cores. The others still needs
to be done. Also filled the reference voltages.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ADC: Fully functional core
simavr ADC allows external code to feed real voltages to the
simulator, and the simulator uses it's 'real' reference voltage
to do the right thing and return the 'proper' 10 bits ADC value
to the AVR firmware.
To send values to the ADC, register your code to wait for the
ADC_IRQ_OUT_TRIGGER irq, and at that point send any of the
ADC_IRQ_ADC* with Millivolts as value.
External trigger is not done yet.
Signed-off-by: Michel Pollet <buserror@gmail.com>
core+elf: Add fields for the MCU voltages
You can now specify AVR_MCU_VOLTAGES(vcc, avcc, aref) in millivolts
in your firmware to set them into the simavr core.
Prerequisite for ADC VREF support.
Signed-off-by: Michel Pollet <buserror@gmail.com>
run_avr: Add a way to trace just interruots vectors
Calling run_avr with -ti <value> will trace the scheduling
of that pacticular vector.
You can have up to 8 traces.
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Fixed an off by one
That was breaking the timers badly in corner cases
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Updated comparators
Also filled up the ones for tinyx5, megax4, tiny2313
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Changed timer config feom a bit array to a normal regbit
Since all the timer seems to have these 2 bits declared
in the same way anyway...
Signed-off-by: Michel Pollet <buserror@gmail.com>
ELF: Fixes a bad malloc
How it didn't crash before, no idea...
Signed-off-by: Michel Pollet <buserror@gmail.com>
mega128: Fixes timer comparators
Bits are in the right order now
Signed-off-by: Michel Pollet <buserror@gmail.com>
twi: Stripped down TWI module to fix compile
New system will take it's place soon
Signed-off-by: Michel Pollet <buserror@gmail.com>
example: Added OC2A to timer test
Uses OC2A toggle with a VCD trace to demo the new compators.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Refactored timer comparators
Based on patch by <tomi.leppikangas@gmail.com> but fixed the other
cores to fix a few cut/paste issues.
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Added comparator modes for pins
Refactored the comparators code, Added the 3 common modes of pin
toggles.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioport: Added a way to get to the IRQ via register addresses
Now can do a ioctl to get the port IRQs by oassing the address of
a PORT/PIN/DDR register and a pin number.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioport: Aded a way to specify the output value via IRQ
Adding 0x100 to the IRQ value simulates a pin output change
and not just a pin input change.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioport: No longer need pcint to change the value
IRQ callback changes the AVR memory even if the pcint is
not present.
Signed-off-by: Michel Pollet <buserror@gmail.com>
TWI: Temp TWI changes with new IRQ system
Signed-off-by: <>
extint: Add more extints IRQs
... and use them on the Mega128 core
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Added EIND support
Not used in any core, for now. It would still need 24 bits PC support
with return addresses to match.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added Mega128
Contributed by Tomi Leppikangas <tomi.leppikangas@gmail.com>
Signed-off-by: Michel Pollet <buserror@gmail.com>
watchdog/eeprom: Added declaration blocks for older cores
For the mega128 generation
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Added (non functional) C interrupt block
Needs some code
Signed-off-by: Michel Pollet <buserror@gmail.com>
flash: Add support for RAMPZ
If declared...
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Add support for RAMPZ and refactor instructions
Added RAMPZ as an optional IOREG for the core.
Factored the [E]I[JMP/CALL] into one blob.
Added the ELMP Instruction with RAMPZ support.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Fixed multiple warnings for -Wall
Twasn't that bad really.
Signed-off-by: Michel Pollet <buserror@gmail.com>
run_avr: Cosmetics
Comments, prints etc.
Signed-off-by: Michel Pollet <buserro@gmail.com>
Makefile: Include eeprom data in .hex files
Now that the loader can load them, include the eeprom
section in the .hex files generated for the examples
Signed-off-by: Michel Pollet <buserror@gmail.com>
run_avr: Supports loading new hex files
Can now load .hex files multiple sections, and also allow
specifying multiple .hex files to load in flash and/or
eeprom.
./run_avr ... -ff flash.hex -ee eeprom.hex ...
Signed-off-by: Michel Pollet <buserror@gmail.com>
elf: Added constants for flash & eeprom start
Added some constants for the addresses used by gcc
to link the flash and eeprom data.
Signed-off-by: Michel Pollet <buserror@gmail.com>
hex: Added a new reader for multiple chunks
.hex files can contain more than one section of data
this new loader handles that, allowing to have multiple
section of flash (app + bootloader) and/or eeprom.
Oh, a test unit too.
Signed-off-by: Michel Pollet <buserror@gmail.com>
VCD: Fixed a buffer overflow
In case we're dumping 32 bits wide traces (!)
Signed-off-by: Michel Pollet <buserror@gmail.com>
TWI: Work in progress
Changed to look more like qemu
Signed-off-by: Michel Pollet <buserror@gmail.com>
Readme fix
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Simplify changes to SREG
SREG is no longer re-synthetized at every instruction,
but only when the firmware reads the register.
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Small cleanup
Removed mutiple defined constants etc
Signed-off-by: Michel Pollet <buserror@gmail.com>
eeprom: fix a less-than bug
Prevented loading the eeprom entire size
Signed-off-by: Michel Pollet <buserror@gmail.com>
watchdog: Added a test module
Small module that tests the watchdog timer
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Add watchdog
Add watchdog block to the existing cores
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Add watchdog timer support
Working base support for the watchdog timer,
and the WDT instruction that resets it.
Signed-off-by: Michel Pollet <buserror@gmail.com>
examples: Ported to Snow Leopard
Uses OSX frameworks if applicable
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Shuffled code around
Moved cycle timer code into it's own files
Signed-off-by: Michel Pollet <buserror@gmail.com>
UART: Added documentation
On how to use the xon/xoff IRQs
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added selfprog bootloader support to x4 series
Untested, but behaves the same as x8 so it should work..
Signed-off-by: Michel Pollet <buserror@gmail.com>
doc: Added a doc directory, and a callgraph generator
You need ctags, graphviz and ruby to re-generate it
Signed-off-by: Michel Pollet <buserror@gmail.com>
simduino: Bootloader now works!
Can program simduino with avrdude!
See the readme for the howto
Signed-off-by: Michel Pollet <buserror@gmail.com>
UART: Added a flag to disable stdio traces
Also fixed the UART when used in non-interupt mode.
Signed-off-by: Michel Pollet <buserror@gmail.com>
SPM: Added Self Programming Instruction & Support
Added the SPM support to the core, and to the x8 devices.
Tested with Arduino's bootloader.
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: No longer craksh when reading TCNT with timer off
Thanks to Jon Escombe
Signed-off-by: Michel Pollet <buserror@gmail.com>
Simduino: Teaser
Forget about it, it doesn't work yet. Loads the bootloader
and thats about it.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Makefile: minor update
Added the optional trace define
Signed-off-by: Michel Pollet <buserror@gmail.com>
UART: Implement a system of flow control
+ The uart now signals (using IRQs) when it's fifo is full and
empty. This allow controling code to send new bytes, or to pause.
+ The uart also now understand the Baud rate and prints it.
+ Added new IOCTL to get/set the UART emulation flags
A new mode of the UART was made specialy for code that spinloops
waiting to get/send a byte. Now if the uart detects that, it will
insert a usleep() when the uart is idle, this will prevent
code from eating 100% cpu doing nothing.
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: No longer crash if "codeline" is missing
Debug macros were crashing if the symbols had not been loaded,
and they are never loaded when usin a .hex file
Signed-off-by: Michel Pollet <buserror@gmail.com>
run_avr et al. New HEX format loader
simavr can now load .hex files directly, It is obviously a lot
more primitive than the ELF loader, but it works.
You have to specify the MCU and the AVR frequency on the command
line to run a .hex, otherwise simavr has no clue what it's suposed
to do.
Also reworked run_avr to get rid of getopt, moved the
read_hex_string function into the new sim_hex.[ch], and now
understand that the base addresd of code is not always zero.
This allows loading of a bootloader (tada!)
Signed-off-by: Michel Pollet <buserror@gmail.com>
core: Added a new ELF tag with AVR->simavr command path
This new mode allow the AVR firmware to specify an (unused)
AVR IO register as a "command path" to send commands back to
simavr.
It allows for example the firmware to start/stop the VCD trace
dump, exactly where it should from the ooint of view of the
firmware being ran.
See atmega88_uart_echo.c for an example.
Signed-off-by: Michel Pollet <buserror@gmail.com>
comments: What don't you typo the comments, too ?
Fixed a few!
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Implemented some of the ICR based timers
Also made a PWM and a Fast PWM mode. Fast pwm doesm't use the
interrupts, as most of the time it's never used. Aldo it kills
performanves when calling a timer every 400 cycles.
Signed-off-by: Michel Pollet <buserror@gmail.com>
misc: Disabled debug traces
No functionsl changes
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Also disable fuse macros
For silly ubuntu
Signed-off-by: Michel Pollet <buserror@gmail.com>