avr_timer: add avr_timer_clear_and_cancel_all_cycle_timers
modified: sim/avr_timer.c
added: avr_timer_clear_and_cancel_all_cycle_timers
fixes a few oversights in original commit(s)
ioport: Don't crash if core defition is incomplete
This is not something that happends on existing cores, but can be
annoying when defining a new one.
Signed-off-by: Michel Pollet <buserror@gmail.com>
io: No functional changes
Just reformating
Signed-off-by: Michel Pollet <buserror@gmail.com>
timer: Added a selective trace option
Allows tracing one timer only
Signed-off-by: Michel Pollet <buserror@gmail.com>
arduidio: Simplified pin mapping
Again...
Signed-off-by: Michel Pollet <buserror@gmail.com>
timers: Gratuitous realignment
Go on with the new, improved narrow codestyle
Signed-off-by: Michel Pollet <buserror@gmail.com>
ADC: Skip SRB register if not present
the mega8/16/32 don't have ADCSRB, this lead to a crash when we tried to
register a callback on it.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Mega 8/16/32 and PORTA
Still register portA, regardless of PORTA constant initialisation
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Gratuitous realignment
ODC got the better of me
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Converted to use the standard fifo
There's already a standard way to make FIFO's, so converted the
interrupt code to use that.
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added support for mega324a / pa..
Support for the renamed SPI block, somehow my headers (debian) don't
have any definition of a second one, but, the macro /should/ support it
now.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #130 from TheCrazyT/twi_i2c_write_fix
Twi i2cwrite fix
fix for wrong return value of i2c_write.
Merge pull request #1 from dougszumski/twi_delay_fix
twi: Remove start condition delay
Merge pull request #126 from ddaygold/typo
Fixed a typo in the manual
Fixed a typo in the manual
Merge pull request #124 from frej/enable-adc-for-atiny13
cores: Add ADC to the ATtiny13
cores: Add ADC to the ATtiny13
gdb: Cleanup
Also make sure we mask of only 24 bits of the address, newer gdb use one
somehow..
Signed-off-by: Michel Pollet <buserror@gmail.com>
cores: Added TIMER2_COMPB to m2560
This was commented out, dunno why..
Signed-off-by: Michel Pollet <buserror@gmail.com>
ihex: Streamlined implementation
Use ihex_read_chunk to implement ihex_read_file, and add a
ihex_free_chuncks for consistency sake
Signed-off-by: Michel Pollet <buserror@gmail.com>
avr: Add a 'reset pc' that can be nonzero
This allows the AVR to soft reset into the bootloader for example.
A watchdog reset will re-run the bootloader with the correct flag.
Signed-off-by: Michel Pollet <buserror@gmail.com>
watchdog: Some cleanup
No functional changes
Signed-off-by: Michel Pollet <buserror@gmail.com>
hex: Supports offsets larger then 64/128KB
New segemnt type for loading atmega2560 bootloaders
Signed-off-by: Michel Pollet <buserror@gmail.com>
simduino: Simplified, made compatible with m2560
Allow testing on atmega256 bootloader too.
Signed-off-by: Michel Pollet <buserror@gmail.com>
avr: Renamed special_* core fields
Added a 'custom' sub struct
Signed-off-by: Michel Pollet <buserror@gmail.com>
Whitespaces at end of line removed..
Dunno how these came to be..
Signed-off-by: Michel Pollet <buserror@gmail.com>
elf: Detect start address (for bootloaders)
Allows loading a bootloader ELF as well as .hex with the right starting
PC
Signed-off-by: Michel Pollet <buserror@gmail.com>
vcd: Prevent crash when close() is called twice
flahs() wasn't checking for a valid file pointer
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Redone the logic of delivery
Simplified a few expressions
Signed-off-by: Michel Pollet <buserror@gmail.com>
interrupts: Now track pending and running states
Introduced two new IRQs per vector; one to track pending, and one to
track running state. So you can see any latency issues.
Also introduced a global pending/running IRQ, so you can track issues if
your interrupts overrun etc.
It is reasonably transparent, and seems to have had little impact on the
rest of the code... Hooray for nice clean APIs!
Signed-off-by: Michel Pollet <buserror@gmail.com>
vcd: Increased limits
Turns out it's easy to reach 32 if you try hard enough!
Signed-off-by: Michel Pollet <buserror@gmail.com>
twi: Revert to NO_STATE after a stop
Otherwise the interrupt might get re-triggered
Signed-off-by: Michel Pollet <buserror@gmail.com>
adc: Removed spurious trace
Accidentally commited this earlier
Signed-off-by: Michel Pollet <buserror@gmail.com>
arduidiot: Further pinout tweaks for 256's
Endless tweaks
Signed-off-by: Michel Pollet <buserror@gmail.com>
twi: Always release STOP bit
Seems some libraries assume this bit will autoclear, even if
the stop condition was not really called for.
Signed-off-by: Michel Pollet <buserror@gmail.com>
adc: bit of reformating
No functional changes
Signed-off-by: Michel Pollet <buserror@gmail.com>
shared: Some more tweaks to arduidiot_pins
Added remaining 2560 pins
Signed-off-by: Michel Pollet <buserror@gmail.com>
Small reformat of long lines
New screen format..
Signed-off-by: Michel Pollet <buserror@gmail.com>
simavr: Fixed mega250 pinouts for arduidiots
Referenced their headers
Signed-off-by: Michel Pollet <buserror@gmail.com>
uart_pty: Added a flush timer
Makes sure the FIFO gets a chance to be cleared after a XOFF
Signed-off-by: Michel Pollet <buserror@gmail.com>
arduidiot_pins: Added mega2560
And added a few utilitarian macros.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #121 from guyzmo/improved_osx_support
added support for MacOSX homebrew
added support for MacOSX homebrew
Signed-off-by: Bernard `Guyzmo` Pratz <guyzmo+github@m0g.net>
Merge pull request #120 from frej/avoid-buffer-overrun
Avoid buffer overrun on smaller AVRs
Avoid buffer overrun on smaller AVRs
On smaller AVRs, such as the attiny13, MAX_IOs will be larger than the
size of SRAM which will lead to out of range writes to a malloc
allocated buffer. Therefore limit the number of bytes cleared to the
size of SRAM.
Merge pull request #119 from bsekisser/bsekisser-adc-initfix
adc: check r_adcsrb is valid before init
adc: check r_adcsrb is valid before init
fix issue #118
modified: simavr/sim/avr_adc.c
Merge pull request #117 from bsekisser/bsekisser-flash-writefix
flash: be sure to use current page for writing
flash: be sure to use current page for writing
bound z to ~(page size - 1), otherwise write may start at anywhere in page to write and fail.
also corrected log line to previous state as was missleading/inacurate.
modified: simavr/sim/avr_flash.c
lin: Don't reset regs at init time
the reset handler does it
Signed-off-by: Michel Pollet <buserror@gmail.com>
lin: Checked a divide by zero condition
As it turn out, static analizer doesn't know lbt is >= 8. Added a
comment there all same for anyon else reading this.
Signed-off-by: Michel Pollet <buserror@gmail.com>
ioport: Don't deref NULL on bad param
that ioctl requires a parameter, but doesn't check it. Static analyzer
doesn't like that at all.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #96 from bsekisser/bsekisser-master-core-remove-bclr-bset
core: Removal of duplicate code...
Merge pull request #110 from cskarai/fix-optiboot-watchdog
Optiboot bootloader unintentionally enables watchdog
Merge pull request #114 from xqms/atmega2560_uart3
Support IO register addresses >= 256
sim_avr.h: increase MAX_IOs by one to 280
ATmega2560 has UDR0 at 0x136 = 310
sim_core + sim_regbit: use 16 bit integers for IO addresses
This is necessary on the larger ATmegas (e.g. ATmega2560).
sim_core: don't hardcode max io register address, use MAX_IOs
add unit test for UART3 echo on ATmega2560
This fails currently because IO addresses >= 256 are not handled correctly
in the core.
Merge pull request #112 from cskarai/fix-timer-ocra-top
Reconfigure fast pwm timer at OCRA write if OCRA is the top
Merge pull request #111 from cskarai/fix-adc-adate
Implemented: ADC free running mode
Reconfigure fast pwm timer at OCRA write if OCRA is the top
Fixed: issue with indentation
Added: free_running autotrigger mode
Added: ADC trigger sources
Fixed: optiboot issue, watchdog is unintentionally enabled
Merge pull request #101 from dougszumski/mx_core_add_extint
cores: Adds missing external interrupt for m16/m32
Merge pull request #103 from distributed/dispatch
sim_io: do not overwrite _avr_io_mux_write in avr_register_io_write
do not overwrite _avr_io_mux_write in avr_register_io_write
Merge pull request #98 from bsekisser/bsekisser-watchdog-software-reset
watchdog: reworked to add support for software reset.
watchdog: reworked to add support for software reset.
support for software reset due to watchdog timeout...
based on watchdog documentation.
modified: sim/sim_avr.c
modifications to avr_reset and avr_init to support software
reset.
modified: sim/sim_avr.h
added type avr_run_t...
avr_t.run updated accordingly.
modified: sim/avr_watchdog.c
largely rewritten to support software reset.
modified: sim/avr_watchdog.h
data record 'reset_context' added to support software reset
modified: sim/sim_regbit.h
added: avr_regbit_from_value
for checking flags before commiting register value.
added: avr_regbit_set_array_from_value
reverse operation of avr_regbit_get_array
Merge pull request #95 from bsekisser/master-core-run-many-limited-interrupt-state
interrupts: modify handling of interrupt state
twi: Remove start condition delay
> This corrects a problem where a non-interrupt driven twi driver
functions on the target (m32) but not in simavr.
> This also fixes ../examples/board_i2ctest so that it functions as
expected.
cores: Adds missing external interrupt for m16/m32
> Async external interrupt (INT2) was missing on m16/32. Since unlike the others
this interrupt uses only 1 bit for sense control avr_extint.* were modified to
support this new mode.
interrupts: modify handling of interrupt state
Interrupt state edge detection and wait states combined into multi
function variable, enabling the removal of edge detection
code in the run loop and simplifying need to service interrupts
by placing the burden on code directly influencing the interrupt
handling state.
modified: simavr/sim/sim_avr.c
edge detection code removed from both run loops.
raw (non-gdb) loop does precheck of interrupt state, while not
necessary, potentially saving a few cycles.
modified: simavr/sim/sim_avr.h
uint8_t i_shadow changed to int8_t interrupt_state.
modified: simavr/sim/sim_core.c
flag changes which may impact interrupt state are routed
through avr_sreg_set().
multi-cycle loop simplified to check avr->interrupt_state.
modified: simavr/sim/sim_core.h
static inline avr_sreg_set() - handles changes to global
interrupt state and ensures wait states if I
flag changes from 0 -> 1. superfluous 1 -> 1
states are ignored, should they occur. and
disabling interrupts clears avr->interrupt_state.
flag changes from SET_SREG_FROM routed to avr_sreg_set();
modified: simavr/sim/sim_interrupts.c
avr_interrupt_reset()
interrupt_state cleared during reset.
avr_raise_intrrupt()
check interrupts enabled and no pending
interrupt_state before marking pending interrupt state.
avr_service_interrupts()
servicing code changed to tick pending wait state then
mark for any pending interrupts or set to zero
if none waiting.
on interrupt, direct interrupt state change to
avr_sreg_set();
modified: simavr/sim/sim_interrupts.h
remove pending_wait.
modified: tests/tests.c
interrupt edge dectection code removed from test run loop.
no further modifications required.
modified: simavr/sim/sim_avr.c
modified: simavr/sim/sim_avr.h
modified: simavr/sim/sim_core.c
modified: simavr/sim/sim_core.h
modified: simavr/sim/sim_interrupts.c
modified: simavr/sim/sim_interrupts.h
modified: tests/tests.c
Merge pull request #100 from bsekisser/bsekisser-cores-spi-declare
cores: add spi declaration
Merge pull request #99 from bsekisser/bsekisser-cores-ioport-declare
cores: AVR_IOPORT_DECLARE
cores: add spi declaration
convert spi structure definitions to AVR_SPI_DECLARE
modified: simavr/cores/sim_90usb162.c
modified: simavr/cores/sim_mega128.c
modified: simavr/cores/sim_mega1280.c
modified: simavr/cores/sim_mega1281.c
modified: simavr/cores/sim_mega128rfr2.c
modified: simavr/cores/sim_mega169.c
modified: simavr/cores/sim_mega2560.c
modified: simavr/cores/sim_megax.h
modified: simavr/cores/sim_megax4.h
modified: simavr/cores/sim_megax8.h
modified: simavr/cores/sim_megaxm1.h
modified: simavr/sim/avr_spi.h
cores: AVR_IOPORT_DECLARE
convert port sructure declarations to macro AVR_IOPORT_DECLARE.
modified: simavr/cores/sim_90usb162.c
modified: simavr/cores/sim_mega128.c
modified: simavr/cores/sim_mega1280.c
modified: simavr/cores/sim_mega1281.c
modified: simavr/cores/sim_mega128rfa1.c
modified: simavr/cores/sim_mega128rfr2.c
modified: simavr/cores/sim_mega169.c
modified: simavr/cores/sim_mega2560.c
modified: simavr/cores/sim_megax.h
modified: simavr/cores/sim_tiny2313.c
modified: simavr/sim/avr_ioport.h
core: Removal of duplicate code...
core contains two functionally equivalent blocks of code... implimenting
cl?, se? and bclr, bset. During operation the case code for
bclr and bset never get called, but as stated does not matter since
code at the top of the block performs the EXACT same function.
technically... using the case code SHOULD be the better performing
option... at the moment though, neither one seems to exhibiting
any advantage over the other.
modified: simavr/sim/sim_core.c
tests: Fix makefile
Was using ${OBJ} before it was declared.
Signed-off-by: Michel Pollet <buserror@gmail.com>
build: fix build of libsimavr.so
Was being linked with itself. Newer gcc are not amused.
Signed-off-by: Michel Pollet <buserror@gmail.com>
build: re-accelerated the build
Simavr used to build pretty quick, and it's been crawling for a while
now, turns out some of the enhancements we added to the SIMAVR path
detection were being evaluated a LOT.
So went to the makefile and made sure most of the static variables are
evaluated once only.
Signed-off-by: Michel Pollet <buserror@gmail.com>
Merge pull request #94 from hedrok/master
Timer simulation fixes and improvements
Merge pull request #92 from cyrozap/master
Fix the issue where Intel HEX files with hex strings longer than 32 bytes would be truncated
Merge pull request #83 from bsekisser/master-core-run-many-limited
Changes to allow for free run in core between cycle timers
Merge pull request #82 from dougszumski/i2c_test_extension
examples: Extends i2ctest to include a second TWI driver
Enhance emulation of PWM mode
- Clear/set output pin on TOP when OCRnX is in clear/set mode,
previously it was changed only on TCNT=OCRnX
- Call PWM irq for OCRnB even when TOP is OCRnA
Fixes in avr_timer_reconfigure after refactoring
Several fixes after
fcce7868a2fe2ef028b7f6c1741a12380b82a9cc:
- Remove zeroing of mode in which erased mode
seleced in avr_timer_write
- Fix wrong brackets in ?: in avr_timer_wgm_pwm mode
sim_hex: Only decrement maxlen in read_hex_string when a byte is added to the array
Without this fix, the output to the buffer would be limited to maxlen/2 bytes
instead of maxlen. It is obvious from the implementation that the latter
behavior is the expected one, so the function has been altered to reflect that.
Merge pull request #88 from anthony-morel/master
fifo: prevent potential misuse of _get_write_size()
fifo: prevent potential misuse of _get_write_size()
Using the number obtained from _get_write_size() and writing that many
items to the fifo yields to _isempty() becoming true and not to
_isfull() becoming true.
I got caught assuming the latter.
To avoid thinking about edge cases and prevent potential misuse of
_get_write_size(), I suggest that it returns one unit less, thus, a
number between 0 and (fifo_size-1). E.g., if there is only one place
left in the fifo, i.e., _isfull() is true, it then returns 0, preventing
us to fill that place and get into a wrap overflow situation.
(Michel: Thanks for the great architecture you laid out and the great
code.)
Changes to allow for free run in core between cycle timers
with per interval limiting.
Average cycle times drop by about upwards of 50-60+ cycles per emulated cycle,
dependant on usage.
sim_avr.h: struct avr_t changed.
added members run_cycle_count and run_cycle_limit.
run_cycle_count is number of cycles till next cycle timer.
run_cycle_limit is maximum number of cycles to run per interval.
sim_core.c: avr_run_one
* run_one_again label added at top.
* clause added at end which loops to run_one_again given that the core
is still in a cpu_Running state, run_cycle_count is greater than
cycles, and no interrups are pending.
sim_cycle_timers.c:
* static avr_cycle_timer_return_sleep_run_cycles_limited() added.
run_cycle_count is bounded to run_cycle_limit.
returns sleep count unbounded, preserving original behavior.
* static avr_cycle_timer_reset_sleep_run_cycles_limited() added.
sets new run_cycle_count based on present list of cycle timers.
* avr_cycle_timer_reset() changed.
run_cycle_count and run_cycle_limit is set to default values.
* avr_cycle_timer_register() changed.
* avr_cycle_timer_cancel() changed.
* avr_cycle_timer_process() changed.
call the relevant function to set/maintain run_cycle_count.
modified: simavr/sim/sim_avr.c
modified: simavr/sim/sim_avr.h
modified: simavr/sim/sim_cycle_timers.c
examples: Extends i2ctest to include a second TWI driver
Adds a commonly used alternative to the Atmel TWI driver. This
particular driver is choosen because it covers a non-interrupt
driven approach to using the TWI module.
Merge pull request #81 from dougszumski/ssd1306_demo
examples: Removed unused code in ssd1306 demo
Merge pull request #80 from dougszumski/avr_twi_bugfix
twi: Clear TWSTO bit after STOP condition transmitted
examples: Removed unused code in ssd1306 demo
twi: Clear TWSTO bit after STOP condition transmitted
> This change fixes a problem where a TWI driver polling the
TWSTO bit would run on the real device but not simavr.
> More detail in for example p188 of the ATMega32A datasheet
(rev 815D-AVR-10/2013).
Merge pull request #78 from dougszumski/i2c_eeprom_bugfix
parts: Bug fix for i2c_eeprom part
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