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Commit 2f67001d
authorMichel Pollet <buserror@gmail.com>
Wed, 6 Jan 2010 22:45:30 +0000 (22:45 +0000)
committerMichel Pollet <buserror@gmail.com>
Wed, 6 Jan 2010 22:47:36 +0000 (22:47 +0000)
treea7615e42b56e3c40a4694e0c3923b9f75b897ea9tree | snapshot
parent7e88785f549405846d957a8d74dc92d92bc57ba6commit | diff
Message:
core: Simplify changes to SREG

SREG is no longer re-synthetized at every instruction,
but only when the firmware reads the register.

Signed-off-by: Michel Pollet <buserror@gmail.com>
3 files changed:
simavr/sim/sim_avr.c diff | blob | history | download
simavr/sim/sim_avr.h diff | blob | history | download
simavr/sim/sim_core.c diff | blob | history | download
simulation of megaAvr microcontrollers