From 062c8d7adcc67f81e2025444711f6a56a1b7a5d2 Mon Sep 17 00:00:00 2001 From: Virgil Dupras Date: Sun, 24 Feb 2019 13:06:24 -0500 Subject: [PATCH] Fix timer1 on tinyx5 The prescaler list for timer1 on the tinyx5 was incomplete. Moreover, having no WGM data made the timer run in `avr_timer_wgm_none`, with a zero size (it would overflow all the time). Setting a default wgm_op makes time timer run in normal mode witha size of 8 bits. --- simavr/cores/sim_tinyx5.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/simavr/cores/sim_tinyx5.h b/simavr/cores/sim_tinyx5.h index 37d9f77..ca7ef25 100644 --- a/simavr/cores/sim_tinyx5.h +++ b/simavr/cores/sim_tinyx5.h @@ -200,9 +200,13 @@ const struct mcu_t SIM_CORENAME = { }, .timer1 = { .name = '1', - // no wgm bits + // timer1 has no wgm bits, but we still need to define a wgm op so that + // we can set a proper kind/size to the timer + .wgm_op = { + [0] = AVR_TIMER_WGM_NORMAL8(), + }, .cs = { AVR_IO_REGBIT(TCCR1, CS10), AVR_IO_REGBIT(TCCR1, CS11), AVR_IO_REGBIT(TCCR1, CS12), AVR_IO_REGBIT(TCCR1, CS13) }, - .cs_div = { 0, 0, 1 /* 2 */, 2 /* 4 */, 3 /* 8 */, 4 /* 16 */ }, + .cs_div = { 0, 0, 1 /* 2 */, 2 /* 4 */, 3 /* 8 */, 4 /* 16 */, 5 /* 32 */, 6 /* 64 */, 7 /* 128 */, 8 /* 256 */, 9 /* 512 */, 10 /* 1024 */, 11 /* 2048 */, 12 /* 4096 */, 13 /* 8192 */, 14 /* 16384 */ }, .r_tcnt = TCNT1, -- 2.39.5