From 4759887051b5c72ac8674515cba6114e49ff22dd Mon Sep 17 00:00:00 2001 From: Michel Pollet Date: Wed, 20 Sep 2017 11:43:11 +0100 Subject: [PATCH] fixup jit Tweaks, some opcodes were borken. Signed-off-by: Michel Pollet --- simavr/sim/sim_core.c | 4 ++-- simavr/sim/sim_core_jit.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/simavr/sim/sim_core.c b/simavr/sim/sim_core.c index 281914e..197fbc9 100644 --- a/simavr/sim/sim_core.c +++ b/simavr/sim/sim_core.c @@ -1039,7 +1039,7 @@ run_one_again: _sreg = _avr_set_r(avr, _sreg, 0, avr->flash[z]); } end_emit; case 0x95d8: { // ELPM -- Load Program Memory R0 <- (Z) -- 1001 0101 1101 1000 - if (!avr->rampz) + if (!avr_rampz) _avr_invalid_opcode(avr); emit { uint32_t z = avr->data[R_ZL] | (avr->data[R_ZH] << 8) | (avr->data[avr_rampz] << 16); @@ -1081,7 +1081,7 @@ run_one_again: _sreg = _avr_set_r(avr, _sreg, d, avr->flash[z]); if (op) { z++; - _sreg = _avr_set_r(avr, _sreg, avr->rampz, z >> 16); + _sreg = _avr_set_r(avr, _sreg, avr_rampz, z >> 16); _avr_set_r16le_hl( R_ZL, z); } cycle += 2; // 3 cycles diff --git a/simavr/sim/sim_core_jit.h b/simavr/sim/sim_core_jit.h index 45f7ea2..6cfb341 100644 --- a/simavr/sim/sim_core_jit.h +++ b/simavr/sim/sim_core_jit.h @@ -396,7 +396,7 @@ jit_generate(opcode, "uint16_t z = avr_data[R_ZL] | (avr_data[R_ZH] << 8);\n" ); } break; case 0x95d8: { // ELPM -- Load Program Memory R0 <- (Z) -- 1001 0101 1101 1000 - if (!avr->rampz) + if (!avr_rampz) _avr_invalid_opcode(avr); { jit_generate(opcode, "uint32_t z = avr_data[R_ZL] | (avr_data[R_ZH] << 8) | (avr_data[avr_rampz] << 16);\n" @@ -441,7 +441,7 @@ jit_generate(opcode, "uint32_t z = avr_data[R_ZL] | (avr_data[R_ZH] << 8) | (avr "_sreg = _avr_set_r(avr, _sreg, d, avr_flash[z]);\n" "if (op) {\n" "z++;\n" -"_sreg = _avr_set_r(avr, _sreg, avr->rampz, z >> 16);\n" +"_sreg = _avr_set_r(avr, _sreg, avr_rampz, z >> 16);\n" "_avr_set_r16le_hl( R_ZL, z);\n" "}\n" "cycle += 2; // 3 cycles\n" -- 2.39.5