From 48920c7ff8859847e7befe65c4d663782f056bd5 Mon Sep 17 00:00:00 2001 From: Michel Pollet Date: Sun, 6 Dec 2009 10:41:23 +0000 Subject: [PATCH] Added tiny13 And macros to declare eeprom with 8 bits address. Signed-off-by: Jon Escombe Signed-off-by: Michel Pollet --- simavr/Makefile | 5 +- simavr/cores/sim_tiny13.c | 122 +++++++++++++++++++++++++++++++++++++ simavr/sim/avr_eeprom.c | 14 ++++- simavr/sim/avr_eeprom.h | 21 +++++++ simavr/sim/sim_avr.c | 2 + tests/attiny85_crash_gdb.c | 5 +- 6 files changed, 160 insertions(+), 9 deletions(-) create mode 100644 simavr/cores/sim_tiny13.c diff --git a/simavr/Makefile b/simavr/Makefile index 72bf44b..cb0c017 100644 --- a/simavr/Makefile +++ b/simavr/Makefile @@ -46,7 +46,7 @@ CFLAGS += ${patsubst %,-I%,${subst :, ,${IPATH}}} LFLAGS = -L/opt/local/lib/ LDFLAGS += -lelf -all: obj ${target} libsimavr.a +all: obj libsimavr.a ${target} obj: @mkdir -p obj @@ -70,8 +70,7 @@ libsimavr.a : ${sim_o} @ar cru $@ $^ @ranlib $@ -${target} : ${cores_o} -${target} : ${sim_o} +${target} : libsimavr.a ${target} : obj/${target}.o @gcc $(CFLAGS) $(LFLAGS) \ ${^} -o $@ \ diff --git a/simavr/cores/sim_tiny13.c b/simavr/cores/sim_tiny13.c new file mode 100644 index 0000000..baba938 --- /dev/null +++ b/simavr/cores/sim_tiny13.c @@ -0,0 +1,122 @@ +/* + sim_tiny13.c + + Copyright 2008, 2009 Michel Pollet + Jon Escombe + + This file is part of simavr. + + simavr is free software: you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation, either version 3 of the License, or + (at your option) any later version. + + simavr is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with simavr. If not, see . + */ + +#include +#include "sim_avr.h" +#include "sim_core_declare.h" +#include "avr_eeprom.h" +#include "avr_ioport.h" +#include "avr_timer8.h" + +#define _AVR_IO_H_ +#define __ASSEMBLER__ +#include "avr/iotn13.h" + +static void init(struct avr_t * avr); +static void reset(struct avr_t * avr); + + +static struct mcu_t { + avr_t core; + avr_eeprom_t eeprom; + avr_ioport_t portb; + avr_timer8_t timer0; +} mcu = { + .core = { + .mmcu = "attiny13", + + /* + * tiny13 has no extended fuse byte, so can not use DEFAULT_CORE macro + */ + .ramend = RAMEND, + .flashend = FLASHEND, + .e2end = E2END, + .vector_size = 2, + .signature = { SIGNATURE_0,SIGNATURE_1,SIGNATURE_2 }, + .fuse = { LFUSE_DEFAULT, HFUSE_DEFAULT }, + + .init = init, + .reset = reset, + }, + AVR_EEPROM_DECLARE_8BIT(EE_RDY_vect), + .portb = { + .name = 'B', .r_port = PORTB, .r_ddr = DDRB, .r_pin = PINB, + .pcint = { + .enable = AVR_IO_REGBIT(GIMSK, PCIE), + .raised = AVR_IO_REGBIT(GIFR, PCIF), + .vector = PCINT0_vect, + }, + .r_pcint = PCMSK, + }, + .timer0 = { + .name = '0', + .wgm = { AVR_IO_REGBIT(TCCR0A, WGM00), AVR_IO_REGBIT(TCCR0A, WGM01), AVR_IO_REGBIT(TCCR0B, WGM02) }, + .cs = { AVR_IO_REGBIT(TCCR0B, CS00), AVR_IO_REGBIT(TCCR0B, CS01), AVR_IO_REGBIT(TCCR0B, CS02) }, + .cs_div = { 0, 0, 3 /* 8 */, 6 /* 64 */, 8 /* 256 */, 10 /* 1024 */ }, + + .r_ocra = OCR0A, + .r_ocrb = OCR0B, + .r_tcnt = TCNT0, + + .overflow = { + .enable = AVR_IO_REGBIT(TIMSK0, TOIE0), + .raised = AVR_IO_REGBIT(TIFR0, TOV0), + .vector = TIM0_OVF_vect, + }, + .compa = { + .enable = AVR_IO_REGBIT(TIMSK0, OCIE0A), + .raised = AVR_IO_REGBIT(TIFR0, OCF0A), + .vector = TIM0_COMPA_vect, + }, + .compb = { + .enable = AVR_IO_REGBIT(TIMSK0, OCIE0B), + .raised = AVR_IO_REGBIT(TIFR0, OCF0B), + .vector = TIM0_COMPB_vect, + }, + }, +}; + +static avr_t * make() +{ + return &mcu.core; +} + +avr_kind_t tiny13 = { + .names = { "attiny13", "attiny13a" }, + .make = make +}; + +static void init(struct avr_t * avr) +{ + struct mcu_t * mcu = (struct mcu_t*)avr; + + printf("%s init\n", avr->mmcu); + + avr_eeprom_init(avr, &mcu->eeprom); + avr_ioport_init(avr, &mcu->portb); + avr_timer8_init(avr, &mcu->timer0); +} + +static void reset(struct avr_t * avr) +{ +// struct mcu_t * mcu = (struct mcu_t*)avr; +} diff --git a/simavr/sim/avr_eeprom.c b/simavr/sim/avr_eeprom.c index 7cbd5a6..bc6cb08 100644 --- a/simavr/sim/avr_eeprom.c +++ b/simavr/sim/avr_eeprom.c @@ -50,9 +50,13 @@ static void avr_eeprom_write(avr_t * avr, uint8_t addr, uint8_t v, void * param) if (!eempe && avr_regbit_get(avr, p->eempe)) { avr_cycle_timer_register(avr, 4, avr_eempe_clear, p); } - + if (eempe && avr_regbit_get(avr, p->eepe)) { // write operation - uint16_t addr = avr->data[p->r_eearl] | (avr->data[p->r_eearh] << 8); + uint16_t addr; + if (p->r_eearh) + addr = avr->data[p->r_eearl] | (avr->data[p->r_eearh] << 8); + else + addr = avr->data[p->r_eearl]; // printf("eeprom write %04x <- %02x\n", addr, avr->data[p->r_eedr]); p->eeprom[addr] = avr->data[p->r_eedr]; // Automatically clears that bit (?) @@ -61,7 +65,11 @@ static void avr_eeprom_write(avr_t * avr, uint8_t addr, uint8_t v, void * param) avr_cycle_timer_register_usec(avr, 3400, avr_eei_raise, p); // 3.4ms here } if (avr_regbit_get(avr, p->eere)) { // read operation - uint16_t addr = avr->data[p->r_eearl] | (avr->data[p->r_eearh] << 8); + uint16_t addr; + if (p->r_eearh) + addr = avr->data[p->r_eearl] | (avr->data[p->r_eearh] << 8); + else + addr = avr->data[p->r_eearl]; avr->data[p->r_eedr] = p->eeprom[addr]; // printf("eeprom read %04x : %02x\n", addr, p->eeprom[addr]); } diff --git a/simavr/sim/avr_eeprom.h b/simavr/sim/avr_eeprom.h index d44826e..7700e4c 100644 --- a/simavr/sim/avr_eeprom.h +++ b/simavr/sim/avr_eeprom.h @@ -78,4 +78,25 @@ typedef struct avr_eeprom_desc_t { },\ } +/* + * macro definition without a high address bit register, + * which is not implemented in some tiny AVRs. + */ + +#define AVR_EEPROM_DECLARE_8BIT(_vector) \ + .eeprom = {\ + .size = E2END+1,\ + .r_eearl = EEARL,\ + .r_eedr = EEDR,\ + .r_eecr = EECR,\ + .eepm = { AVR_IO_REGBIT(EECR, EEPM0), AVR_IO_REGBIT(EECR, EEPM1) },\ + .eempe = AVR_IO_REGBIT(EECR, EEMPE),\ + .eepe = AVR_IO_REGBIT(EECR, EEPE),\ + .eere = AVR_IO_REGBIT(EECR, EERE),\ + .ready = {\ + .enable = AVR_IO_REGBIT(EECR, EERIE),\ + .vector = _vector,\ + },\ + } + #endif /* __AVR_EEPROM_H__ */ diff --git a/simavr/sim/sim_avr.c b/simavr/sim/sim_avr.c index fc3a672..b3ac37b 100644 --- a/simavr/sim/sim_avr.c +++ b/simavr/sim/sim_avr.c @@ -281,11 +281,13 @@ int avr_run(avr_t * avr) } +extern avr_kind_t tiny13; extern avr_kind_t tiny25,tiny45,tiny85; extern avr_kind_t mega48,mega88,mega168; extern avr_kind_t mega644; avr_kind_t * avr_kind[] = { + &tiny13, &tiny25, &tiny45, &tiny85, diff --git a/tests/attiny85_crash_gdb.c b/tests/attiny85_crash_gdb.c index cfa5bb8..3bcaf59 100644 --- a/tests/attiny85_crash_gdb.c +++ b/tests/attiny85_crash_gdb.c @@ -6,11 +6,11 @@ */ #include +#include #include "avr_mcu_section.h" AVR_MCU(F_CPU, "attiny85"); -int value = 0; int main() { @@ -19,11 +19,10 @@ int main() * this is not much, but that crashed the core, and should activate * the gdb server properly, so you can see it stopped, here */ - value++; *((uint8_t*)0xdead) = 0x55; // should never reach here ! - value++; + sleep_mode(); } -- 2.39.5