From 749050d9c32c7908ad518ea2ce85f221f35f6606 Mon Sep 17 00:00:00 2001 From: Bastien Scher Date: Wed, 18 Oct 2017 12:15:51 +0200 Subject: [PATCH] Fix timer mode 14 for timers 1, 3, 4 and 5 on Atmega2560 --- simavr/cores/sim_mega2560.c | 8 ++++---- simavr/sim/avr_timer.c | 9 ++++++--- simavr/sim/avr_timer.h | 1 + 3 files changed, 11 insertions(+), 7 deletions(-) diff --git a/simavr/cores/sim_mega2560.c b/simavr/cores/sim_mega2560.c index 2004498..14ab652 100644 --- a/simavr/cores/sim_mega2560.c +++ b/simavr/cores/sim_mega2560.c @@ -275,7 +275,7 @@ const struct mcu_t { [7] = AVR_TIMER_WGM_FASTPWM10(), // TODO: 8, 9 PWM phase and freq correct ICR & 10, 11 [12] = AVR_TIMER_WGM_ICCTC(), - [14] = AVR_TIMER_WGM_ICPWM(), + [14] = AVR_TIMER_WGM_ICFASTPWM(), [15] = AVR_TIMER_WGM_OCPWM(), }, .cs = { AVR_IO_REGBIT(TCCR1B, CS10), AVR_IO_REGBIT(TCCR1B, CS11), AVR_IO_REGBIT(TCCR1B, CS12) }, @@ -401,7 +401,7 @@ const struct mcu_t { // 10 // 11 [12] = AVR_TIMER_WGM_ICCTC(), - [14] = AVR_TIMER_WGM_ICPWM(), + [14] = AVR_TIMER_WGM_ICFASTPWM(), [15] = AVR_TIMER_WGM_OCPWM(), }, .cs = { AVR_IO_REGBIT(TCCR3B, CS30), AVR_IO_REGBIT(TCCR3B, CS31), AVR_IO_REGBIT(TCCR3B, CS32) }, @@ -478,7 +478,7 @@ const struct mcu_t { [7] = AVR_TIMER_WGM_FASTPWM10(), // TODO: 8, 9 PWM phase and freq correct ICR & 10, 11 [12] = AVR_TIMER_WGM_ICCTC(), - [14] = AVR_TIMER_WGM_ICPWM(), + [14] = AVR_TIMER_WGM_ICFASTPWM(), [15] = AVR_TIMER_WGM_OCPWM(), }, .cs = { AVR_IO_REGBIT(TCCR4B, CS40), AVR_IO_REGBIT(TCCR4B, CS41), AVR_IO_REGBIT(TCCR4B, CS42) }, @@ -556,7 +556,7 @@ const struct mcu_t { [7] = AVR_TIMER_WGM_FASTPWM10(), // TODO: 8, 9 PWM phase and freq correct ICR & 10, 11 [12] = AVR_TIMER_WGM_ICCTC(), - [14] = AVR_TIMER_WGM_ICPWM(), + [14] = AVR_TIMER_WGM_ICFASTPWM(), [15] = AVR_TIMER_WGM_OCPWM(), }, .cs = { AVR_IO_REGBIT(TCCR5B, CS50), AVR_IO_REGBIT(TCCR5B, CS51), AVR_IO_REGBIT(TCCR5B, CS52) }, diff --git a/simavr/sim/avr_timer.c b/simavr/sim/avr_timer.c index d430aa2..6be4a29 100644 --- a/simavr/sim/avr_timer.c +++ b/simavr/sim/avr_timer.c @@ -575,9 +575,12 @@ avr_timer_reconfigure( _timer_get_ocr(p, AVR_TIMER_COMPA) : _timer_get_icr(p); avr_timer_configure(p, p->cs_div_value, top, reset); } break; - case avr_timer_wgm_fast_pwm: - avr_timer_configure(p, p->cs_div_value, p->wgm_op_mode_size, reset); - break; + case avr_timer_wgm_fast_pwm: { + uint16_t top = + (p->mode.top == avr_timer_wgm_reg_icr) ? _timer_get_icr(p) : + p->wgm_op_mode_size; + avr_timer_configure(p, p->cs_div_value, top, reset); + } break; case avr_timer_wgm_none: avr_timer_configure(p, p->cs_div_value, p->wgm_op_mode_size, reset); break; diff --git a/simavr/sim/avr_timer.h b/simavr/sim/avr_timer.h index e0c18e0..8e99857 100644 --- a/simavr/sim/avr_timer.h +++ b/simavr/sim/avr_timer.h @@ -104,6 +104,7 @@ typedef struct avr_timer_wgm_t { #define AVR_TIMER_WGM_FCPWM10() { .kind = avr_timer_wgm_fc_pwm, .size=10 } #define AVR_TIMER_WGM_OCPWM() { .kind = avr_timer_wgm_pwm, .top = avr_timer_wgm_reg_ocra } #define AVR_TIMER_WGM_ICPWM() { .kind = avr_timer_wgm_pwm, .top = avr_timer_wgm_reg_icr } +#define AVR_TIMER_WGM_ICFASTPWM() { .kind = avr_timer_wgm_fast_pwm, .top = avr_timer_wgm_reg_icr } typedef struct avr_timer_comp_t { avr_int_vector_t interrupt; // interrupt vector -- 2.39.5