From e58a4c12191abd3b910e34842ada9b23590a708b Mon Sep 17 00:00:00 2001 From: Michel Pollet Date: Thu, 4 May 2017 11:15:41 +0100 Subject: [PATCH] vcd: Decrease the VCD resolution From about 1GHz to 100MHz. Shouldn't have an impact on simavr proper, but might help with Pulseview Signed-off-by: Michel Pollet --- simavr/sim/sim_vcd_file.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/simavr/sim/sim_vcd_file.c b/simavr/sim/sim_vcd_file.c index f0d80be..246ae7c 100644 --- a/simavr/sim/sim_vcd_file.c +++ b/simavr/sim/sim_vcd_file.c @@ -398,8 +398,8 @@ avr_vcd_flush_log( while (!avr_vcd_fifo_isempty(&vcd->log)) { avr_vcd_log_t l = avr_vcd_fifo_read(&vcd->log); - // 1ns base - uint64_t base = avr_cycles_to_nsec(vcd->avr, l.when - vcd->start); + // 10ns base -- 100MHz should be enough + uint64_t base = avr_cycles_to_nsec(vcd->avr, l.when - vcd->start) / 10; /* * if that trace was seen in this nsec already, we fudge the @@ -525,7 +525,7 @@ avr_vcd_start( return -1; } - fprintf(vcd->output, "$timescale 1ns $end\n"); // 1ns base + fprintf(vcd->output, "$timescale 10ns $end\n"); // 10ns base, aka 100MHz fprintf(vcd->output, "$scope module logic $end\n"); for (int i = 0; i < vcd->signal_count; i++) { -- 2.39.5