From d3c1b0fe32cae1cb537d253be62a4a3065e3c4e7 Mon Sep 17 00:00:00 2001 From: ga Date: Tue, 23 Mar 2021 21:20:56 +0000 Subject: [PATCH] Fixes for ATmega2560 and friend: enable pin change interrupts on PORTK; conditionally enable pin change interrupts on PORTE/0 - shared with PORTJ; run the ACOMP initialisation function; add close relative ATmega2561. --- simavr/cores/sim_mega2560.c | 5 +++-- simavr/cores/sim_mega2560.h | 30 ++++++++++++++++++++++++++---- 2 files changed, 29 insertions(+), 6 deletions(-) diff --git a/simavr/cores/sim_mega2560.c b/simavr/cores/sim_mega2560.c index a967b78..ecd1949 100644 --- a/simavr/cores/sim_mega2560.c +++ b/simavr/cores/sim_mega2560.c @@ -29,8 +29,8 @@ static avr_t * make() } avr_kind_t mega2560 = { - .names = { "atmega2560" }, - .make = make + .names = { "atmega2560", "atmega2561" }, + .make = make }; void m2560_init(struct avr_t * avr) @@ -57,6 +57,7 @@ void m2560_init(struct avr_t * avr) avr_uart_init(avr, &mcu->uart1); avr_uart_init(avr, &mcu->uart2); avr_uart_init(avr, &mcu->uart3); + avr_acomp_init(avr, &mcu->acomp); avr_adc_init(avr, &mcu->adc); avr_timer_init(avr, &mcu->timer0); avr_timer_init(avr, &mcu->timer1); diff --git a/simavr/cores/sim_mega2560.h b/simavr/cores/sim_mega2560.h index 7e8974c..6f46993 100644 --- a/simavr/cores/sim_mega2560.h +++ b/simavr/cores/sim_mega2560.h @@ -94,11 +94,25 @@ const struct mcu_t { .raised = AVR_IO_REGBIT(PCIFR, PCIF0), .vector = PCINT0_vect, }, - .r_pcint = PCMSK0, + .r_pcint = PCMSK0, // PB0-7 have PCINT0-7 }, AVR_IOPORT_DECLARE(c, 'C', C), AVR_IOPORT_DECLARE(d, 'D', D), - AVR_IOPORT_DECLARE(e, 'E', E), +#ifdef SPLIT_INTERRUPTS + .porte = { + .name = 'E', .r_port = PORTE, .r_ddr = DDRE, .r_pin = PINE, + .pcint = { + .enable = AVR_IO_REGBIT(PCICR, PCIE1), + .raised = AVR_IO_REGBIT(PCIFR, PCIF1), + .vector = PCINT1_vect, + .mask = 1, // PE0 has PCINT8 + .shift = 0 + }, + .r_pcint = PCMSK1, + }, +#else + AVR_IOPORT_DECLARE(e, 'E', E), // PE0 has PCINT8 +#endif AVR_IOPORT_DECLARE(f, 'F', F), AVR_IOPORT_DECLARE(g, 'G', G), AVR_IOPORT_DECLARE(h, 'H', H), @@ -108,12 +122,20 @@ const struct mcu_t { .enable = AVR_IO_REGBIT(PCICR, PCIE1), .raised = AVR_IO_REGBIT(PCIFR, PCIF1), .vector = PCINT1_vect, - .mask = 0b11111110, + .mask = 0b11111110, // PJ0-6 have PCINT9-15 .shift = -1 }, .r_pcint = PCMSK1, }, - AVR_IOPORT_DECLARE(k, 'K', K), + .portk = { + .name = 'K', .r_port = PORTK, .r_ddr = DDRK, .r_pin = PINK, + .pcint = { + .enable = AVR_IO_REGBIT(PCICR, PCIE2), + .raised = AVR_IO_REGBIT(PCIFR, PCIF2), + .vector = PCINT2_vect, + }, + .r_pcint = PCMSK2, // PK0-7 have PCINT16-23 + }, AVR_IOPORT_DECLARE(l, 'L', L), AVR_UARTX_DECLARE(0, PRR0, PRUSART0), -- 2.39.5